|
9707698281
|
cleanup
|
2021-07-03 18:48:07 -06:00 |
|
|
2225ccd311
|
trying to also use .c files. Not yet working but doesn't break .as files
|
2021-07-02 05:16:30 -06:00 |
|
|
b79c572a22
|
tweak makefile
|
2021-07-02 04:58:58 -06:00 |
|
|
c0852697df
|
remove outdated comment
|
2021-07-02 04:52:48 -06:00 |
|
|
5e87ea0c75
|
fix loading of sectios other than .text and get rid of massive sed chain for .hex generation
|
2021-07-02 04:47:40 -06:00 |
|
|
9031b5b4c5
|
working load/store word with byte addressed memory
|
2021-07-02 04:32:25 -06:00 |
|
|
35423ce4af
|
works with 8bit addressed memory (rather than word addressed)
|
2021-07-02 04:22:33 -06:00 |
|
|
57e745b336
|
more clean up and reorganization from memory restructuring
|
2021-07-02 03:28:21 -06:00 |
|
|
69e4ea9204
|
clean up core_tb.v a little
|
2021-07-02 03:20:38 -06:00 |
|
|
07d317eb6e
|
add trailing NOP instructions so non-initialized memory doesn't cause issues
|
2021-07-02 03:14:37 -06:00 |
|
|
9ff977c1be
|
partially working with common address space. loading of .data section has been disabled
|
2021-07-02 03:11:50 -06:00 |
|
|
17a95b58c8
|
fix the code issues I just introduced
|
2021-07-02 02:39:43 -06:00 |
|
|
0a9b182ef7
|
BAD CODE: testing that CI pipeline catches verilog issues
|
2021-07-02 02:39:13 -06:00 |
|
|
07c2fb570c
|
BAD CODE: to test CI pipeline
|
2021-07-02 02:38:01 -06:00 |
|
|
e24d230f1a
|
Update .gitlab-ci.yml file
|
2021-07-02 08:35:22 +00:00 |
|
|
efe2696313
|
Update .gitlab-ci.yml file
|
2021-07-02 08:33:53 +00:00 |
|
|
04443b191a
|
Update .gitlab-ci.yml file
|
2021-07-02 08:33:02 +00:00 |
|
|
f963054244
|
Update .gitlab-ci.yml file
|
2021-07-02 08:30:50 +00:00 |
|
|
5d0a394b41
|
Update .gitlab-ci.yml file
|
2021-07-02 08:26:25 +00:00 |
|
|
c1c7c13ce0
|
Update .gitlab-ci.yml file
|
2021-07-02 08:24:56 +00:00 |
|
|
fd743338c9
|
Update .gitlab-ci.yml file
|
2021-07-02 08:22:30 +00:00 |
|
|
f2ac820e7e
|
Update .gitlab-ci.yml file
|
2021-07-02 08:19:22 +00:00 |
|
|
1184255fca
|
Update .gitlab-ci.yml file
|
2021-07-02 08:19:17 +00:00 |
|
|
b2875388b2
|
remove old sim file from xilinx toolchain
|
2021-07-02 02:08:48 -06:00 |
|
|
6f574abc9d
|
clean up
|
2021-07-02 02:07:22 -06:00 |
|
|
e32e451e60
|
update waveform view
|
2021-07-02 02:03:32 -06:00 |
|
|
5c59c97797
|
build software project in same makefile as hardware project
|
2021-07-02 02:03:32 -06:00 |
|
|
4580631939
|
clean up hdl directory
|
2021-07-02 02:03:32 -06:00 |
|
|
fc232b0d8b
|
remove unnecessary stuff
|
2021-07-02 02:03:32 -06:00 |
|
|
efd4cb6e48
|
build test code into build directory
|
2021-07-02 02:03:32 -06:00 |
|
|
180f05fb0a
|
shift to iverilog + gtkwave for simulation
|
2021-07-02 02:03:32 -06:00 |
|
|
82283f01f4
|
Add README.md
|
2021-05-04 04:47:58 +00:00 |
|
|
a6a8b68c3b
|
untracked files
|
2021-05-03 22:13:26 -06:00 |
|
|
96c9a06589
|
uncommitted changes
|
2021-05-03 22:13:11 -06:00 |
|
|
a2a85fd10b
|
add test for immediate offsets for lw instruction
|
2020-11-14 23:48:08 -07:00 |
|
|
d58661e289
|
add more extensive memory test
|
2020-11-14 23:36:23 -07:00 |
|
|
6d39c01740
|
fix testbench so both load and store work
|
2020-11-14 23:21:33 -07:00 |
|
|
f0166f1954
|
load (word only) appears to be working
|
2020-11-14 23:13:24 -07:00 |
|
|
4a25ca6def
|
fix issue of jumping to address 0
|
2020-11-14 23:04:24 -07:00 |
|
|
caf9a6f4f7
|
separate .text and .data for instruction and data memory
|
2020-11-10 00:19:42 -07:00 |
|
|
32d0a2dcaa
|
display more data to simplify verification
|
2020-11-09 23:38:22 -07:00 |
|
|
21883dbd84
|
passes quick test: bne, bge, bgeu
|
2020-11-09 20:22:18 -07:00 |
|
|
6e0d9c96a1
|
passes quick test: beq, blt, bltu
|
2020-11-09 20:01:25 -07:00 |
|
|
06d0e07c61
|
clean up some notes in test.S
|
2020-11-07 00:54:50 -07:00 |
|
|
f6c0fb7da1
|
remove lots of nop
|
2020-11-07 00:53:49 -07:00 |
|
|
82cbaba7e5
|
I think this properly stalls for all implemented instructions so I don't need nops
|
2020-11-07 00:47:20 -07:00 |
|
|
1290418aa3
|
properly flushes pipeline after jump
|
2020-11-06 23:18:37 -07:00 |
|
|
c25b9bcb0f
|
passes quick test: auipc
|
2020-10-16 18:59:25 -06:00 |
|
|
c98881c5d7
|
passes quick test: slt, slti, sltu, sltiu
|
2020-10-16 18:51:51 -06:00 |
|
|
48c8b035bd
|
add instruction decoder spreadsheet
|
2020-10-16 18:26:05 -06:00 |
|