This website requires JavaScript.
Explore
Help
Sign In
brendanhaines
/
cpu
Watch
1
Star
0
Fork
0
You've already forked cpu
Code
Issues
Pull Requests
Packages
Projects
Releases
Wiki
Activity
26
Commits
2
Branches
0
Tags
4a25ca6defc42a528505d5da76e4836b8e83a195
Go to file
Code
Clone
HTTPS
Tea CLI
Open with VS Code
Open with VSCodium
Open with Intellij IDEA
Download ZIP
Download TAR.GZ
Download BUNDLE
Brendan Haines
4a25ca6def
fix issue of jumping to address 0
2020-11-14 23:04:24 -07:00
hdl
fix issue of jumping to address 0
2020-11-14 23:04:24 -07:00
sim
fix issue of jumping to address 0
2020-11-14 23:04:24 -07:00
test
fix issue of jumping to address 0
2020-11-14 23:04:24 -07:00
.gitignore
initial commit. Non-working due to newly added MEM backpressure signal
2020-09-27 16:04:16 -06:00
.gitmodules
uggh. now it doesn't track the submodule when I move it
2020-09-27 18:06:35 -06:00
Makefile
initial commit. Non-working due to newly added MEM backpressure signal
2020-09-27 16:04:16 -06:00
pins.ucf
initial commit. Non-working due to newly added MEM backpressure signal
2020-09-27 16:04:16 -06:00
project.cfg
passes quick tests for: lui, addi, add, sub, and, or, xor, andi. jump works but does not link
2020-10-11 23:03:14 -06:00
Description
RISC-V CPU
174
KiB
Languages
Verilog
44.4%
SystemVerilog
36.4%
Assembly
14.9%
Makefile
3.8%
Shell
0.4%
