RISC-V CPU
Go to file
2020-11-07 00:53:49 -07:00
hdl I think this properly stalls for all implemented instructions so I don't need nops 2020-11-07 00:47:20 -07:00
sim I think this properly stalls for all implemented instructions so I don't need nops 2020-11-07 00:47:20 -07:00
test remove lots of nop 2020-11-07 00:53:49 -07:00
.gitignore initial commit. Non-working due to newly added MEM backpressure signal 2020-09-27 16:04:16 -06:00
.gitmodules uggh. now it doesn't track the submodule when I move it 2020-09-27 18:06:35 -06:00
Makefile initial commit. Non-working due to newly added MEM backpressure signal 2020-09-27 16:04:16 -06:00
pins.ucf initial commit. Non-working due to newly added MEM backpressure signal 2020-09-27 16:04:16 -06:00
project.cfg passes quick tests for: lui, addi, add, sub, and, or, xor, andi. jump works but does not link 2020-10-11 23:03:14 -06:00