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b8568acb26
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build all objects
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2025-08-28 23:05:30 -06:00 |
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43e2e897f7
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remove riscv toolchain
Build / Run Test `test_basic` (push) Successful in -1m0s
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2025-08-28 22:57:29 -06:00 |
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cfbc68221a
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passing simulation
Build / Run Test `test_basic` (push) Successful in 33s
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2025-08-28 22:35:48 -06:00 |
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b231133858
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verbosity
Build / Enumerate tests (push) Successful in -1m10s
Build / Run Test `test_basic` (push) Successful in -1m9s
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2025-08-28 20:26:54 -06:00 |
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1533ddb4f5
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explicit matrix because gitea runner isn't happy
Build / Enumerate tests (push) Successful in -1m10s
Build / Run Test `test_basic` (push) Successful in -1m8s
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2025-08-28 20:25:33 -06:00 |
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bb13d09825
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Build all tests in CI
Build / Enumerate tests (push) Successful in -1m6s
Build / Run Test `${{ matrix.test }}` (push) Failing after -1m5s
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2025-08-28 20:09:26 -06:00 |
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9c254f29fa
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remove gitlab CI indicator from README.md
Build / Build C code (push) Successful in 11s
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2025-08-28 00:58:01 -06:00 |
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965e127989
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move wire definitions before usage
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2025-08-28 00:54:08 -06:00 |
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01c91fec99
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add risc-v syntax hilighting
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2025-08-28 00:53:50 -06:00 |
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294dfc6b47
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trying to get sim to run in CI properly
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2025-08-28 00:53:13 -06:00 |
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ecf0b6bba2
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update github actions
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2025-08-28 00:14:57 -06:00 |
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50a342fe9c
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switch to a newer riscv toolchain image with a Dockerfile I can edit if I ever want
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2025-08-25 21:43:44 -06:00 |
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5eb65bce9d
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change gcc prefix to match docker image
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2025-08-25 21:32:36 -06:00 |
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70a53c200c
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compile riscv in docker
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2025-08-25 21:31:48 -06:00 |
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f8c7460b29
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fix rdata output
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2022-12-07 20:03:13 -07:00 |
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2c19633fb5
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update .gitlab-ci.yml
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2022-12-01 02:17:51 -07:00 |
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e264602c1b
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Log levels are great but need more than one bit. oops
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2022-12-01 02:12:27 -07:00 |
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d3844129d3
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assert now catches X properly
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2022-12-01 02:09:51 -07:00 |
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cb7fbe84a5
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why does X look like 0 in my assertion for rdata?
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2022-12-01 02:04:17 -07:00 |
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c63a025615
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remove reference to old axil bridge location
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2022-12-01 01:14:01 -07:00 |
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e301d2c4d2
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move axil bridge
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2022-12-01 01:13:23 -07:00 |
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5d3d9b222f
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formatting
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2022-12-01 01:07:15 -07:00 |
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f12d3be0bd
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update makefile
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2022-12-01 01:05:39 -07:00 |
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38a91579ec
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working assertion lib
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2022-12-01 01:03:23 -07:00 |
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ebc3b22ac7
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restructure testbenches and common code
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2022-12-01 00:45:57 -07:00 |
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a2b0b2a709
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add skidbuffer. Untested
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2022-11-19 23:41:15 -07:00 |
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f770ad28c7
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comments n stuff
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2022-11-19 21:24:08 -07:00 |
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c6b68bb555
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Update .gitlab-ci.yml
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2022-11-19 21:23:07 -07:00 |
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249cf34339
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add bh_asserts.sv. Untested
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2022-11-19 18:41:50 -07:00 |
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449efd3c3c
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use systemverilog 2012 for simulation
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2022-11-19 18:41:25 -07:00 |
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8055444b99
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add correct riscv toolchain. Build takes forever so I'll probably add the binaries later
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2022-11-19 18:40:37 -07:00 |
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c1ec8520be
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implement axi-lite to wishbone bridge. Untested
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2022-11-19 18:37:35 -07:00 |
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03828419a9
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add linting in vscode
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2022-11-19 16:27:52 -07:00 |
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0fea83e14c
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update .gitlab-ci.yml
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2022-01-27 21:47:20 -07:00 |
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12e3078c2a
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should fix CI after moving tests
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2021-09-09 01:06:19 -06:00 |
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2d69722cb1
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rename testbench to tests
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2021-09-09 00:58:28 -06:00 |
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b7cd786182
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move some stuff
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2021-09-09 00:56:45 -06:00 |
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96295e0a7c
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update README.md
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2021-09-09 00:54:41 -06:00 |
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0fb69204e0
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indentation
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2021-09-09 00:45:36 -06:00 |
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fb3a59381b
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remove hack from when I was compiling for rv64i and running on rv32i
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2021-09-09 00:44:49 -06:00 |
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5413047464
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restore CPPFLAGS
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2021-09-09 00:32:24 -06:00 |
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a9c5f815ba
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disable non-functional test_c
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2021-09-09 00:20:20 -06:00 |
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7ab99bb5ff
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add start of JTAG TAP
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2021-09-09 00:06:57 -06:00 |
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625001152d
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update tests
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2021-09-09 00:06:15 -06:00 |
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8901e538e1
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rename basic_test to test_basic
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2021-09-08 23:44:45 -06:00 |
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d8161743eb
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add C compilation test
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2021-09-08 23:43:15 -06:00 |
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8b60773d2b
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switch to rv32i compiler
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2021-09-08 23:17:34 -06:00 |
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cb10d24050
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add README.md for basic_test
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2021-08-11 00:42:03 -06:00 |
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0caee84a0e
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add pipeline status to README.md
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2021-08-11 06:28:00 +00:00 |
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5dc815245e
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hopefully fix pipeline
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2021-08-11 00:24:05 -06:00 |
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