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switch to rv32i compiler

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This commit is contained in:
Brendan Haines 2021-09-08 23:17:34 -06:00
parent cb10d24050
commit 8b60773d2b
3 changed files with 5 additions and 7 deletions
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1
.gitignore vendored
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@ -1 +1,2 @@
build/
*.~lock*

8
testbench/basic_test/Makefile
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@ -12,8 +12,8 @@ OBJ = $(notdir $(SOURCE_AS:.S=.o))
OBJ += $(notdir $(SOURCE_C:.c=.o))
CC = riscv64-linux-gnu-gcc-8
# CFLAGS = -march=rv32i -mabi=ilp32
CFLAGS = -march=rv64i -mabi=lp64
CFLAGS = -march=rv32i -mabi=ilp32
# CFLAGS = -march=rv64i -mabi=lp64
CPPFLAGS =
@ -21,7 +21,7 @@ AS = riscv64-linux-gnu-as
ASFLAGS = $(CFLAGS)
LD = riscv64-linux-gnu-ld
LDFLAGS = -T
LDFLAGS = -melf32lriscv_ilp32
# $(info $$TESTBENCH_V is [${TESTBENCH_V}])
@ -39,7 +39,7 @@ LDFLAGS = -T
$(CC) $(CPPFLAGS) $(CFLAGS) $^ -o $@
%.elf: %.ld $(OBJ)
$(LD) $(LDFLAGS) $^ -o $@
$(LD) $(LDFLAGS) -T $^ -o $@
%.hex: %.elf
riscv64-linux-gnu-objcopy --target=verilog $< $@

3
testbench/basic_test/test.S
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@ -50,19 +50,16 @@ _start:
# slli
slli x24, x23, 4 # x24 = 0x00007880
slli x25, x2, 1 # x25 = 0xfffffffe
slli x26, x2, 63 # x26 = 0x80000000 # NOTE: gcc should not allow this since shamt is only 5 bits. discarding high bit so 63 = 31
slli x27, x2, 31 # x27 = 0x80000000
# srli
srli x28, x23, 4 # x28 = 0x00000078
srli x29, x2, 1 # x29 = 0x7fffffff
srli x30, x2, 63 # x30 = 0x00000001 # NOTE: gcc should not allow this since shamt is only 5 bits. discarding high bit so 63 = 31
srli x3, x2, 31 # x3 = 0x00000001
# srai
srai x4, x23, 4 # x4 = 0x00000078
srai x5, x2, 1 # x5 = 0xffffffff
srai x6, x2, 63 # x6 = 0xffffffff # NOTE: gcc should not allow this since shamt is only 5 bits. discarding high bit so 63 = 31
srai x7, x2, 31 # x7 = 0xffffffff
# sll