move wire definitions before usage

src/bh_cpu.v

@@ -120,19 +120,6 @@ reg s_if_stall = 0;
 reg [31:0] s_if_next_pc;
 reg [31:0] s_if_inst;
 
-always @(*) begin
-    s_if_stall = s_id_stall;
-
-    if (s_ex_take_branch) begin
-        s_if_next_pc    = s_ex_branch_addr;
-    end else begin
-        s_if_next_pc    = r_if_pc + 4;
-    end
-
-    mem_inst_addr   = r_if_pc;
-    s_if_inst       = mem_inst_data;
-end
-
 // ID
 reg s_id_stall;
 reg [6:0] s_id_opcode;
@@ -177,7 +164,39 @@ localparam  ALUOP_ADD   = 4'b0000,
             ALUOP_SLT   = 4'b1000,
             ALUOP_SLTU  = 4'b1001;
 
+// EX
+reg s_ex_stall = 0;
+reg [31:0] s_ex_data1, s_ex_data2;
+reg [31:0] s_ex_alu_out;
+reg s_ex_alu_zero;
+reg s_ex_take_branch;
+reg [31:0] s_ex_branch_addr;
+reg [31:0] s_ex_ra;
 
+// MEM
+reg s_mem_stall = 0;
+reg s_mem_bp;
+reg [31:0] s_mem_load_data;
+
+// WB
+reg [31:0] s_wb_data;
+reg s_wb_write;
+
+// IF
+always @(*) begin
+    s_if_stall = s_id_stall;
+
+    if (s_ex_take_branch) begin
+        s_if_next_pc    = s_ex_branch_addr;
+    end else begin
+        s_if_next_pc    = r_if_pc + 4;
+    end
+
+    mem_inst_addr   = r_if_pc;
+    s_if_inst       = mem_inst_data;
+end
+
+// ID
 always @(*) begin
     s_id_invalid = 0;
     s_id_store = 0;
@@ -332,14 +351,6 @@ always @(*) begin
 end
 
 // EX
-reg s_ex_stall = 0;
-reg [31:0] s_ex_data1, s_ex_data2;
-reg [31:0] s_ex_alu_out;
-reg s_ex_alu_zero;
-reg s_ex_take_branch;
-reg [31:0] s_ex_branch_addr;
-reg [31:0] s_ex_ra;
-
 always @(*) begin
     s_ex_stall = s_mem_stall;
 
@@ -394,10 +405,6 @@ always @(*) begin
 end
 
 // MEM
-reg s_mem_stall = 0;
-reg s_mem_bp;
-reg [31:0] s_mem_load_data;
-
 always @(*) begin
     s_mem_stall = 0;    // TODO: add stall logic when actually reading/writing
     s_mem_bp = 0;
@@ -417,9 +424,6 @@ always @(*) begin
 end
 
 // WB
-reg [31:0] s_wb_data;
-reg s_wb_write;
-
 always @(*) begin
 
     // load instructions do not use output of alu in wb