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brendanhaines/cpu

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mirror of https://gitlab.com/brendanhaines/cpu.git synced 2024-11-09 21:14:57 -07:00

5cb8b7dd77 start adding parallel ATA stuff parallel_ata Brendan Haines 2023-01-23 18:26:44 -0700
51103c378d update comment Brendan Haines 2023-01-23 18:26:14 -0700
71bc903f14 ignore overrun at end of skidbuffer test Brendan Haines 2022-12-28 22:24:55 -0700
3b476cfc32 update gtkw paths Brendan Haines 2022-12-28 22:10:18 -0700
02db181281 comment Brendan Haines 2022-12-28 22:07:28 -0700
f8c7460b29 fix rdata output master Brendan Haines 2022-12-07 20:03:13 -0700
2c19633fb5 update .gitlab-ci.yml Brendan Haines 2022-12-01 02:17:51 -0700
e264602c1b Log levels are great but need more than one bit. oops Brendan Haines 2022-12-01 02:12:27 -0700
d3844129d3 assert now catches X properly Brendan Haines 2022-12-01 02:09:51 -0700
cb7fbe84a5 why does X look like 0 in my assertion for rdata? Brendan Haines 2022-12-01 02:04:17 -0700
c63a025615 remove reference to old axil bridge location Brendan Haines 2022-12-01 01:14:01 -0700
e301d2c4d2 move axil bridge Brendan Haines 2022-12-01 01:13:23 -0700
5d3d9b222f formatting Brendan Haines 2022-12-01 01:07:15 -0700
f12d3be0bd update makefile Brendan Haines 2022-12-01 01:05:39 -0700
38a91579ec working assertion lib Brendan Haines 2022-12-01 01:03:23 -0700
ebc3b22ac7 restructure testbenches and common code Brendan Haines 2022-12-01 00:45:57 -0700
a2b0b2a709 add skidbuffer. Untested Brendan Haines 2022-11-19 23:41:15 -0700
f770ad28c7 comments n stuff Brendan Haines 2022-11-19 21:24:08 -0700
c6b68bb555 Update .gitlab-ci.yml Brendan Haines 2022-11-19 21:23:07 -0700
249cf34339 add bh_asserts.sv. Untested Brendan Haines 2022-11-19 18:41:50 -0700
449efd3c3c use systemverilog 2012 for simulation Brendan Haines 2022-11-19 18:41:25 -0700
8055444b99 add correct riscv toolchain. Build takes forever so I'll probably add the binaries later Brendan Haines 2022-11-19 18:40:37 -0700
c1ec8520be implement axi-lite to wishbone bridge. Untested Brendan Haines 2022-11-19 18:37:35 -0700
03828419a9 add linting in vscode Brendan Haines 2022-11-19 16:27:52 -0700
0fea83e14c update .gitlab-ci.yml Brendan Haines 2022-01-27 21:47:20 -0700
12e3078c2a should fix CI after moving tests Brendan Haines 2021-09-09 01:06:19 -0600
2d69722cb1 rename testbench to tests Brendan Haines 2021-09-09 00:58:28 -0600
b7cd786182 move some stuff Brendan Haines 2021-09-09 00:56:45 -0600
96295e0a7c update README.md Brendan Haines 2021-09-09 00:54:41 -0600
0fb69204e0 indentation Brendan Haines 2021-09-09 00:45:36 -0600
fb3a59381b remove hack from when I was compiling for rv64i and running on rv32i Brendan Haines 2021-09-09 00:44:49 -0600
5413047464 restore CPPFLAGS Brendan Haines 2021-09-09 00:32:24 -0600
a9c5f815ba disable non-functional test_c Brendan Haines 2021-09-09 00:20:20 -0600
7ab99bb5ff add start of JTAG TAP Brendan Haines 2021-09-09 00:06:57 -0600
625001152d update tests Brendan Haines 2021-09-09 00:06:15 -0600
8901e538e1 rename basic_test to test_basic Brendan Haines 2021-09-08 23:44:45 -0600
d8161743eb add C compilation test Brendan Haines 2021-09-08 23:43:15 -0600
8b60773d2b switch to rv32i compiler Brendan Haines 2021-09-08 23:17:34 -0600
cb10d24050 add README.md for basic_test Brendan Haines 2021-08-11 00:42:03 -0600
0caee84a0e add pipeline status to README.md Brendan Haines 2021-08-11 06:28:00 +0000
5dc815245e hopefully fix pipeline Brendan Haines 2021-08-11 00:24:05 -0600
855eb67940 hardcode top level makefile Brendan Haines 2021-08-11 00:21:00 -0600
8211013a0c rename Brendan Haines 2021-08-11 00:19:50 -0600
392e0a24ed large restructure Brendan Haines 2021-08-11 00:18:46 -0600
6b0a72d516 add a basic diagram Brendan Haines 2021-07-03 21:18:03 -0600
8decf52443 make mem_data_rvalid a reg in tb Brendan Haines 2021-07-03 21:17:42 -0600
cc4101c1f8 prevent simulation from printing all writes to regfile Brendan Haines 2021-07-03 21:02:48 -0600
34dc20f115 fix intentional test.S error Brendan Haines 2021-07-03 21:01:29 -0600
c03866f56a BAD CODE: check pipeline's ability to detect test script failure Brendan Haines 2021-07-03 21:00:34 -0600
e3c52db637 make sim will now fail if test hits fail state Brendan Haines 2021-07-03 20:59:03 -0600
d4ed4ec2bc add ability to wait for memory writes Brendan Haines 2021-07-03 19:39:22 -0600
dd8bad9610 Fix .gitlab-ci.yml file Brendan Haines 2021-07-04 00:52:26 +0000
bd6c60fe92 Fix .gitlab-ci.yml Brendan Haines 2021-07-04 00:50:25 +0000
9707698281 cleanup Brendan Haines 2021-07-03 18:48:07 -0600
2225ccd311 trying to also use .c files. Not yet working but doesn't break .as files Brendan Haines 2021-07-02 05:16:30 -0600
b79c572a22 tweak makefile Brendan Haines 2021-07-02 04:58:58 -0600
c0852697df remove outdated comment Brendan Haines 2021-07-02 04:52:48 -0600
5e87ea0c75 fix loading of sectios other than .text and get rid of massive sed chain for .hex generation Brendan Haines 2021-07-02 04:47:40 -0600
9031b5b4c5 working load/store word with byte addressed memory Brendan Haines 2021-07-02 04:32:25 -0600
35423ce4af works with 8bit addressed memory (rather than word addressed) Brendan Haines 2021-07-02 04:22:33 -0600
57e745b336 more clean up and reorganization from memory restructuring Brendan Haines 2021-07-02 03:28:21 -0600
69e4ea9204 clean up core_tb.v a little Brendan Haines 2021-07-02 03:20:38 -0600
07d317eb6e add trailing NOP instructions so non-initialized memory doesn't cause issues Brendan Haines 2021-07-02 03:14:37 -0600
9ff977c1be partially working with common address space. loading of .data section has been disabled Brendan Haines 2021-07-02 03:11:50 -0600
17a95b58c8 fix the code issues I just introduced Brendan Haines 2021-07-02 02:39:43 -0600
0a9b182ef7 BAD CODE: testing that CI pipeline catches verilog issues Brendan Haines 2021-07-02 02:39:13 -0600
07c2fb570c BAD CODE: to test CI pipeline Brendan Haines 2021-07-02 02:37:48 -0600
e24d230f1a Update .gitlab-ci.yml file Brendan Haines 2021-07-02 08:35:22 +0000
efe2696313 Update .gitlab-ci.yml file Brendan Haines 2021-07-02 08:33:53 +0000
04443b191a Update .gitlab-ci.yml file Brendan Haines 2021-07-02 08:33:02 +0000
f963054244 Update .gitlab-ci.yml file Brendan Haines 2021-07-02 08:30:50 +0000
5d0a394b41 Update .gitlab-ci.yml file Brendan Haines 2021-07-02 08:26:25 +0000
c1c7c13ce0 Update .gitlab-ci.yml file Brendan Haines 2021-07-02 08:24:56 +0000
fd743338c9 Update .gitlab-ci.yml file Brendan Haines 2021-07-02 08:22:30 +0000
f2ac820e7e Update .gitlab-ci.yml file Brendan Haines 2021-07-02 08:19:22 +0000
1184255fca Update .gitlab-ci.yml file Brendan Haines 2021-07-02 08:19:17 +0000
b2875388b2 remove old sim file from xilinx toolchain Brendan Haines 2021-07-02 02:08:48 -0600
6f574abc9d clean up Brendan Haines 2021-07-02 02:07:22 -0600
e32e451e60 update waveform view Brendan Haines 2021-07-02 02:02:11 -0600
5c59c97797 build software project in same makefile as hardware project Brendan Haines 2021-07-02 01:42:11 -0600
4580631939 clean up hdl directory Brendan Haines 2021-07-02 01:31:30 -0600
fc232b0d8b remove unnecessary stuff Brendan Haines 2021-07-02 01:28:53 -0600
efd4cb6e48 build test code into build directory Brendan Haines 2021-07-02 01:28:23 -0600
180f05fb0a shift to iverilog + gtkwave for simulation Brendan Haines 2021-07-02 00:49:13 -0600
82283f01f4 Add README.md Brendan Haines 2021-05-04 04:47:58 +0000
a6a8b68c3b untracked files Brendan Haines 2021-05-03 22:13:26 -0600
96c9a06589 uncommitted changes Brendan Haines 2021-05-03 22:13:11 -0600
a2a85fd10b add test for immediate offsets for lw instruction Brendan Haines 2020-11-14 23:48:08 -0700
d58661e289 add more extensive memory test Brendan Haines 2020-11-14 23:36:23 -0700
6d39c01740 fix testbench so both load and store work Brendan Haines 2020-11-14 23:21:33 -0700
f0166f1954 load (word only) appears to be working Brendan Haines 2020-11-14 23:13:24 -0700
4a25ca6def fix issue of jumping to address 0 Brendan Haines 2020-11-14 23:04:24 -0700
caf9a6f4f7 separate .text and .data for instruction and data memory Brendan Haines 2020-11-10 00:19:42 -0700
32d0a2dcaa display more data to simplify verification Brendan Haines 2020-11-09 23:38:22 -0700
21883dbd84 passes quick test: bne, bge, bgeu Brendan Haines 2020-11-09 20:22:18 -0700
6e0d9c96a1 passes quick test: beq, blt, bltu Brendan Haines 2020-11-09 20:01:25 -0700
06d0e07c61 clean up some notes in test.S Brendan Haines 2020-11-07 00:54:50 -0700
f6c0fb7da1 remove lots of nop Brendan Haines 2020-11-07 00:53:49 -0700
82cbaba7e5 I think this properly stalls for all implemented instructions so I don't need nops Brendan Haines 2020-11-07 00:47:20 -0700
1290418aa3 properly flushes pipeline after jump Brendan Haines 2020-11-06 23:18:37 -0700

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