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f12d3be0bd
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update makefile
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2022-12-01 01:05:39 -07:00 |
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ebc3b22ac7
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restructure testbenches and common code
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2022-12-01 00:45:57 -07:00 |
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a2b0b2a709
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add skidbuffer. Untested
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2022-11-19 23:41:15 -07:00 |
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f770ad28c7
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comments n stuff
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2022-11-19 21:24:08 -07:00 |
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449efd3c3c
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use systemverilog 2012 for simulation
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2022-11-19 18:41:25 -07:00 |
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c1ec8520be
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implement axi-lite to wishbone bridge. Untested
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2022-11-19 18:37:35 -07:00 |
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2d69722cb1
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rename testbench to tests
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2021-09-09 00:58:28 -06:00 |
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