cpu/test/test.S

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6.8 KiB
ArmAsm
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.global _start
.text
_start:
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# NOTE: nop required because cpu currently does not detect when something is needed from a later stage of the pipeline.
# 4 clocks allows one instruction to finish before the next reads the regfile
# JAL
# JALR
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# lui
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lui x1, 0xfedcb # x1 = 0xfedcb000
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nop
nop
nop
# addi
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addi x1, x1, 0x789 # x1 = 0xfedcb789
addi x2, x0, -1 # x2 = 0xffffffff
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nop
nop
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addi x3, x1, -0x777 # x3 = 0xfedcb012
nop
nop
nop
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# add
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add x4, x1, x2 # x4 = 0xfedcb788
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nop
nop
nop
# sub
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sub x5, x1, x3 # x5 = 0x00000777
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nop
nop
nop
# and
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and x6, x1, x2 # x6 = 0xfedcb789
and x7, x1, x0 # x7 = 0x00000000
and x8, x4, x3 # x8 = 0xfedcb000
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nop
nop
nop
# or
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or x9, x1, x2 # x9 = 0xffffffff
or x10, x1, x0 # x10 = 0xfedcb789
or x11, x4, x3 # x11 = 0x0xfedcb79a
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nop
nop
nop
# xor
xor x12, x1, x2 # x12 = 0x01234876
xor x13, x1, x1 # x13 = 0x00000000
xor x14, x0, x2 # x14 = 0xffffffff
nop
nop
nop
# andi
andi x15, x2, -1348 # x15 = 0xfffffabc -1348 = 0xfffffabc
andi x16, x2, 0x123 # x16 = 0x00000123
andi x17, x1, -1645 # x17 = 0xfedcb181 -1645 = 0xfffff993
nop
nop
nop
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# ori
ori x18, x2, 0x000 # x18 = 0xffffffff
ori x19, x0, 0x768 # x19 = 0x768
ori x20, x1, 0x7ff # x20 = 0xfedcb7ff
nop
nop
nop
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# xori
xori x21, x2, 0x123 # x21 = 0xfffffedc
xori x22, x1, 0x788 # x22 = 0xfedcb001
xori x23, x0, 0x788 # x23 = 0x00000788
nop
nop
nop
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# slli
slli x24, x23, 4 # x24 = 0x00007880
slli x25, x2, 1 # x25 = 0xfffffffe
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slli x26, x2, 63 # x26 = 0x80000000 # NOTE: gcc should not allow this since shamt is only 5 bits. discarding high bit so 63 = 31
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slli x27, x2, 31 # x27 = 0x80000000
nop
nop
nop
# srli
srli x28, x23, 4 # x28 = 0x00000078
srli x29, x2, 1 # x29 = 0x7fffffff
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srli x30, x2, 63 # x30 = 0x00000001 # NOTE: gcc should not allow this since shamt is only 5 bits. discarding high bit so 63 = 31
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srli x3, x2, 31 # x3 = 0x00000001
nop
nop
nop
# srai
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srai x4, x23, 4 # x4 = 0x00000078
srai x5, x2, 1 # x5 = 0xffffffff
srai x6, x2, 63 # x6 = 0xffffffff # NOTE: gcc should not allow this since shamt is only 5 bits. discarding high bit so 63 = 31
srai x7, x2, 31 # x7 = 0xffffffff
nop
nop
nop
# sll
addi x8, x0, 4 # x8 = 0x00000004
addi x9, x0, 1 # x9 = 0x00000001
addi x10, x0, 63 # x10 = 0x0000003f
addi x11, x0, 31 # x11 = 0x0000001f
sll x12, x23, x8 # x12 = 0x00007880 # 4
sll x13, x2, x9 # x13 = 0xfffffffe # 1
sll x14, x2, x10 # x14 = 0x80000000 # 63 = 31
sll x15, x2, x11 # x15 = 0x80000000 # 31
sll x16, x1, x0 # x16 = 0xfedcb789 # 0
sll x17, x1, x2 # x17 = 0x80000000 # -1=31
nop
nop
nop
# srl
srl x18, x23, x8 # x18 = 0x00000078 # 4
srl x19, x2, x9 # x17 = 0x7fffffff # 1
srl x20, x2, x10 # x20 = 0x00000001 # 63 = 31
srl x21, x2, x11 # x21 = 0x00000001 # 31
srl x22, x1, x0 # x22 = 0xfedcb789 # 0
srl x24, x1, x2 # x24 = 0x00000001 # -1=31
nop
nop
nop
# sra
sra x25, x23, x8 # x25 = 0x00000078 # 4
sra x26, x2, x9 # x26 = 0xffffffff # 1
sra x27, x2, x10 # x27 = 0xffffffff # 63 = 31
sra x28, x2, x11 # x28 = 0xffffffff # 31
sra x29, x1, x0 # x29 = 0xfedcb789 # 0
sra x30, x1, x2 # x30 = 0xffffffff # -1=31
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nop
nop
nop
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# slti
addi x3, x0, 1 # x3 = 0x00000001
addi x4, x0, 0x010 # x4 = 0x00000010
addi x5, x0, 0x100 # x5 = 0x00000100
nop
sub x6, x0, x3 # x6 = 0xffffffff
sub x7, x0, x4 # x7 = 0xfffffff0
sub x8, x0, x5 # x7 = 0xffffff00
nop
slti x9, x3, 0 # x9 = 0x00000000
slti x10, x3, 1 # x10 = 0x00000000
slti x11, x3, 2 # x11 = 0x00000001
slti x12, x3, -1 # x12 = 0x00000000
slti x13, x7, 0 # x13 = 0x00000001
slti x14, x7, -17 # x14 = 0x00000000
nop
nop
nop
# sltiu
sltiu x15, x3, 0 # x15 = 0x00000000
sltiu x16, x3, 1 # x16 = 0x00000000
sltiu x17, x3, 2 # x17 = 0x00000001
sltiu x18, x3, -1 # x18 = 0x00000001 # -1=0xffffffff
sltiu x19, x7, 0 # x19 = 0x00000000
sltiu x20, x7, -15 # x20 = 0x00000001 # -15=0xfffffff1
nop
nop
nop
# slt
slt x21, x0, x3 # x21 = 0x00000001
slt x22, x3, x0 # x22 = 0x00000000
slt x23, x3, x3 # x23 = 0x00000000
slt x24, x3, x6 # x24 = 0x00000000
slt x25, x6, x3 # x25 = 0x00000001
nop
nop
nop
# sltu
sltu x26, x0, x3 # x26 = 0x00000001
sltu x27, x3, x0 # x27 = 0x00000000
sltu x28, x3, x3 # x28 = 0x00000000
sltu x29, x3, x6 # x29 = 0x00000001
sltu x30, x6, x3 # x30 = 0x00000000
nop
nop
nop
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# auipc
auipc x3, 0 # x3 = pc + 0
auipc x4, 3 # x4 = pc + 0x3000
auipc x5, 0xfffff # x5 = pc + 0xfffff000
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# TODO: verify auipc adds and does not concatenate (must have PC>0xfff for this)
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nop
nop
nop
# counter and infinite loop
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nop
nop
nop
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addi x31, x0, 1 # x1 = 1
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loop:
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nop
nop
nop
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addi x31, x31, 1 # increment x1
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nop
nop
nop
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jal x1, loop # loop forever
addi x2, x0, 0 # NOTE: this should never be executed
addi x3, x0, 0 # NOTE: this should never be executed
addi x4, x0, 0 # NOTE: this should never be executed
addi x5, x0, 0 # NOTE: this should never be executed
addi x6, x0, 0 # NOTE: this should never be executed
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nop
nop
nop
nop
nop
nop
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.data