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explicitly specify sources
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@ -3,10 +3,13 @@ PIN_DEF = pins.pcf
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DEVICE = hx8k
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PACKAGE = ct256
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SOURCE_V = $(wildcard *.v)
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TESTBENCH_V = $(wildcard tb/*.v)
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all: $(PROJ).rpt $(PROJ).bin
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%.blif: %.v
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yosys -p 'synth_ice40 -top top -blif $@' $(wildcard *.v)
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yosys -p 'synth_ice40 -top top -blif $@' $(SOURCE_V)
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# yosys -p 'synth_ice40 -top top -blif $@' $<
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%.asc: $(PIN_DEF) %.blif
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@ -25,7 +28,7 @@ sudo-prog: $(PROJ).bin
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@echo 'Executing prog as root!!!'
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sudo iceprog $<
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tb.out: $(wildcard *.v) $(wildcard tb/*.v)
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tb.out: $(SOURCE_V) $(TESTBENCH_V)
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iverilog $^ -o $@
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sim: tb.out
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