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19 lines
218 B
Verilog
19 lines
218 B
Verilog
// Author: Brendan Haines
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// Date: 2020-05-04
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module top(
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input clk,
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input n_reset,
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output [7:0] led
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);
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counter #(
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.BITS(8)
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) count(
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.clk(clk),
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.reset(~n_reset),
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.y(led)
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);
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endmodule
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