cpu/hdl
2020-11-10 00:19:42 -07:00
..
tb separate .text and .data for instruction and data memory 2020-11-10 00:19:42 -07:00
axi_lite_memory.v passes quick tests for: lui, addi, add, sub, and, or, xor, andi. jump works but does not link 2020-10-11 23:03:14 -06:00
core.v display more data to simplify verification 2020-11-09 23:38:22 -07:00
top.v initial commit. Non-working due to newly added MEM backpressure signal 2020-09-27 16:04:16 -06:00