mirror of
https://gitlab.com/brendanhaines/cpu.git
synced 2024-11-09 21:14:57 -07:00
146 lines
3.3 KiB
ArmAsm
146 lines
3.3 KiB
ArmAsm
.global _start
|
|
.text
|
|
_start:
|
|
# NOTE: nop required because cpu currently does not detect when something is needed from a later stage of the pipeline.
|
|
# 4 clocks allows one instruction to finish before the next reads the regfile
|
|
|
|
# AUIPC
|
|
# JAL
|
|
# JALR
|
|
|
|
# SLTI
|
|
# SLTUI
|
|
|
|
# SLL
|
|
# SRL
|
|
# SRA
|
|
# SLT
|
|
# SLTU
|
|
|
|
# lui
|
|
lui x1, 0xfedcb # x1 = 0xfedcb000
|
|
nop
|
|
nop
|
|
nop
|
|
|
|
# addi
|
|
addi x1, x1, 0x789 # x1 = 0xfedcb789
|
|
addi x2, x0, -1 # x2 = 0xffffffff
|
|
nop
|
|
nop
|
|
addi x3, x1, -0x777 # x3 = 0xfedcb012
|
|
nop
|
|
nop
|
|
nop
|
|
|
|
# add
|
|
add x4, x1, x2 # x4 = 0xfedcb788
|
|
nop
|
|
nop
|
|
nop
|
|
|
|
# sub
|
|
sub x5, x1, x3 # x5 = 0x00000777
|
|
nop
|
|
nop
|
|
nop
|
|
|
|
# and
|
|
and x6, x1, x2 # x6 = 0xfedcb789
|
|
and x7, x1, x0 # x7 = 0x00000000
|
|
and x8, x4, x3 # x8 = 0xfedcb000
|
|
nop
|
|
nop
|
|
nop
|
|
|
|
# or
|
|
or x9, x1, x2 # x9 = 0xffffffff
|
|
or x10, x1, x0 # x10 = 0xfedcb789
|
|
or x11, x4, x3 # x11 = 0x0xfedcb79a
|
|
nop
|
|
nop
|
|
nop
|
|
|
|
# xor
|
|
xor x12, x1, x2 # x12 = 0x01234876
|
|
xor x13, x1, x1 # x13 = 0x00000000
|
|
xor x14, x0, x2 # x14 = 0xffffffff
|
|
nop
|
|
nop
|
|
nop
|
|
|
|
# andi
|
|
andi x15, x2, -1348 # x15 = 0xfffffabc -1348 = 0xfffffabc
|
|
andi x16, x2, 0x123 # x16 = 0x00000123
|
|
andi x17, x1, -1645 # x17 = 0xfedcb181 -1645 = 0xfffff993
|
|
nop
|
|
nop
|
|
nop
|
|
|
|
# ori
|
|
ori x18, x2, 0x000 # x18 = 0xffffffff
|
|
ori x19, x0, 0x768 # x19 = 0x768
|
|
ori x20, x1, 0x7ff # x20 = 0xfedcb7ff
|
|
nop
|
|
nop
|
|
nop
|
|
|
|
# xori
|
|
xori x21, x2, 0x123 # x21 = 0xfffffedc
|
|
xori x22, x1, 0x788 # x22 = 0xfedcb001
|
|
xori x23, x0, 0x788 # x23 = 0x00000788
|
|
nop
|
|
nop
|
|
nop
|
|
|
|
# slli
|
|
slli x24, x23, 4 # x24 = 0x00007880
|
|
slli x25, x2, 1 # x25 = 0xfffffffe
|
|
slli x26, x2, 63 # x26 = 0x00000000 // NOTE: I would expect GCC to throw an error here. It tolerates up to 63 bit shift despite assembling for 32b
|
|
slli x27, x2, 31 # x27 = 0x80000000
|
|
nop
|
|
nop
|
|
nop
|
|
|
|
# srli
|
|
srli x28, x23, 4 # x28 = 0x00000078
|
|
srli x29, x2, 1 # x29 = 0x7fffffff
|
|
srli x30, x2, 63 # x30 = 0x00000000 // NOTE: I would expect GCC to throw an error here. It tolerates up to 63 bit shift despite assembling for 32b
|
|
srli x3, x2, 31 # x3 = 0x00000001
|
|
nop
|
|
nop
|
|
nop
|
|
|
|
# srai
|
|
srai x4, x23, 4 # x4 = 0x00000078 // fails
|
|
srai x5, x2, 1 # x5 = 0xffffffff
|
|
srai x6, x2, 63 # x6 = 0xffffffff // NOTE: I would expect GCC to throw an error here. It tolerates up to 63 bit shift despite assembling for 32b
|
|
srai x7, x2, 31 # x7 = 0xffffffff
|
|
nop
|
|
nop
|
|
nop
|
|
|
|
# counter and infinite loop
|
|
nop
|
|
nop
|
|
nop
|
|
addi x31, x0, 1 # x1 = 1
|
|
|
|
loop:
|
|
nop
|
|
nop
|
|
nop
|
|
addi x31, x31, 1 # increment x1
|
|
nop
|
|
nop
|
|
nop
|
|
j loop # loop forever
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
|
|
.data
|