mirror of
https://gitlab.com/brendanhaines/cpu.git
synced 2024-09-19 20:36:00 -06:00
125 lines
2.3 KiB
ArmAsm
125 lines
2.3 KiB
ArmAsm
.global _start
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.text
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_start:
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# NOTE: nop required because cpu currently does not detect when something is needed from a later stage of the pipeline.
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# 4 clocks allows one instruction to finish before the next reads the regfile
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# AUIPC
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# JAL
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# JALR
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# XORI
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# ORI
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# SLLI
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# SRLI
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# SRAI
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# SLTI
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# SLTUI
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# SLL
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# SRL
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# SRA
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# SLT
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# SLTU
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# lui
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lui x1, 0xfedcb # x1 = 0xfedcb000
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nop
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nop
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nop
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# addi
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addi x1, x1, 0x789 # x1 = 0xfedcb789
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addi x2, x0, -1 # x2 = 0xffffffff
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nop
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nop
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addi x3, x1, -0x777 # x3 = 0xfedcb012
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nop
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nop
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nop
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# add
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add x4, x1, x2 # x4 = 0xfedcb788
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nop
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nop
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nop
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# sub
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sub x5, x1, x3 # x5 = 0x00000777
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nop
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nop
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nop
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# and
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and x6, x1, x2 # x6 = 0xfedcb789
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and x7, x1, x0 # x7 = 0x00000000
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and x8, x4, x3 # x8 = 0xfedcb000
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nop
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nop
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nop
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# or
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or x9, x1, x2 # x9 = 0xffffffff
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or x10, x1, x0 # x10 = 0xfedcb789
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or x11, x4, x3 # x11 = 0x0xfedcb79a
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nop
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nop
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nop
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# xor
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xor x12, x1, x2 # x12 = 0x01234876
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xor x13, x1, x1 # x13 = 0x00000000
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xor x14, x0, x2 # x14 = 0xffffffff
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nop
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nop
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nop
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# andi
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andi x15, x2, -1348 # x15 = 0xfffffabc -1348 = 0xfffffabc
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andi x16, x2, 0x123 # x16 = 0x00000123
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andi x17, x1, -1645 # x17 = 0xfedcb181 -1645 = 0xfffff993
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nop
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nop
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nop
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# # ori
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# ori x9, x1, x2 # x9 = 0xffffffff
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# ori x10, x1, x0 # x10 = 0xfedcb789
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# ori x11, x4, x3 # x11 = 0x0xfedcb79a
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# nop
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# nop
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# nop
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# # xori
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# xori x12, x1, x2 # x12 = 0x01234876
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# xori x13, x1, x1 # x13 = 0x00000000
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# xori x14, x0, x2 # x14 = 0xffffffff
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# nop
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# nop
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# nop
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# counter and infinite loop
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nop
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nop
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nop
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addi x31, x0, 1 # x1 = 1
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loop:
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nop
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nop
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nop
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addi x31, x31, 1 # increment x1
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nop
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nop
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nop
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j loop # loop forever
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nop
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nop
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nop
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nop
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nop
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nop
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.data
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