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parallel_ata
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5 Commits

Author SHA1 Message Date
Brendan Haines
c63a025615 remove reference to old axil bridge location 2022-12-01 01:14:01 -07:00
Brendan Haines
f12d3be0bd update makefile 2022-12-01 01:05:39 -07:00
Brendan Haines
ebc3b22ac7 restructure testbenches and common code 2022-12-01 00:45:57 -07:00
Brendan Haines
449efd3c3c use systemverilog 2012 for simulation 2022-11-19 18:41:25 -07:00
Brendan Haines
2d69722cb1 rename testbench to tests 2021-09-09 00:58:28 -06:00