restructure testbenches and common code

lib/tb/Makefile

@@ -0,0 +1,23 @@
+all: verify
+
+TESTBENCH_V = $(wildcard *_tb.sv)
+SOURCE_V = $(wildcard ../*.v ../*.sv)
+LOGS = $(TESTBENCH_V:.sv=.log)
+
+# Hardware compilation
+%.out: %.sv $(SOURCE_V)
+	iverilog -g2012 -o $@ $^
+
+# Run test
+%.vcd %.log: %.out
+	./$< | tee $(patsubst %.out, %.log, $<)
+
+verify: $(LOGS)
+	@! grep -q "ERROR" $^
+	@grep -q "SUCCESS" $^
+
+clean:
+	rm -rf *.vcd *.log *.out
+
+.SECONDARY: %.log %.vcd
+.PHONY: all clean verify