tweak makefile

This commit is contained in:
Brendan Haines 2021-07-02 04:58:58 -06:00
parent c0852697df
commit b79c572a22

View File

@ -40,9 +40,10 @@ $(BUILD_DIR)/%.elf: test/%.ld $(BUILD_DIR)/%.o | $(BUILD_DIR)
%.hex: %.elf %.hex: %.elf
riscv64-linux-gnu-objcopy --target=verilog $< $@ riscv64-linux-gnu-objcopy --target=verilog $< $@
sim: $(BUILD_DIR)/tb.out $(BUILD_DIR)/test.hex $(BUILD_DIR)/core_tb.vcd: $(BUILD_DIR)/tb.out $(BUILD_DIR)/test.hex
cd $(BUILD_DIR) && ./tb.out cd $(BUILD_DIR) && ./tb.out
sim: $(BUILD_DIR)/core_tb.vcd
## General ## General
$(BUILD_DIR): $(BUILD_DIR):