diff --git a/Makefile b/Makefile
index 8e3abdb..53a7ea6 100644
--- a/Makefile
+++ b/Makefile
@@ -40,9 +40,10 @@ $(BUILD_DIR)/%.elf: test/%.ld $(BUILD_DIR)/%.o | $(BUILD_DIR)
 %.hex: %.elf
 	riscv64-linux-gnu-objcopy --target=verilog $< $@
 
-sim: $(BUILD_DIR)/tb.out $(BUILD_DIR)/test.hex
+$(BUILD_DIR)/core_tb.vcd: $(BUILD_DIR)/tb.out $(BUILD_DIR)/test.hex
 	cd $(BUILD_DIR) && ./tb.out
 
+sim: $(BUILD_DIR)/core_tb.vcd
 
 ## General
 $(BUILD_DIR):