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passes quick test: slli, srli, srai
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46a0972803
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10
hdl/core.v
10
hdl/core.v
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@ -222,9 +222,9 @@ always @(*) begin
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10'b100xxxxxxx: s_id_aluop = ALUOP_XOR; // XORI
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10'b100xxxxxxx: s_id_aluop = ALUOP_XOR; // XORI
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10'b110xxxxxxx: s_id_aluop = ALUOP_OR; // ORI
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10'b110xxxxxxx: s_id_aluop = ALUOP_OR; // ORI
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10'b111xxxxxxx: s_id_aluop = ALUOP_AND; // ANDI
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10'b111xxxxxxx: s_id_aluop = ALUOP_AND; // ANDI
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10'b0010000000: s_id_aluop = ALUOP_SL; // SLLI
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10'b001000000x: s_id_aluop = ALUOP_SL; // SLLI // NOTE: technically s_id_funct7[0] must be 0 however GCC allows shifts of up to 63b despite assembling for 32b. I can tolerate this deviation from ISA spec at essentially no cost
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10'b1010000000: s_id_aluop = ALUOP_SRL; // SRLI
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10'b101000000x: s_id_aluop = ALUOP_SRL; // SRLI // NOTE: technically s_id_funct7[0] must be 0 however GCC allows shifts of up to 63b despite assembling for 32b. I can tolerate this deviation from ISA spec at essentially no cost
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10'b1010100000: s_id_aluop = ALUOP_SRA; // SRAI
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10'b101010000x: s_id_aluop = ALUOP_SRA; // SRAI // NOTE: technically s_id_funct7[0] must be 0 however GCC allows shifts of up to 63b despite assembling for 32b. I can tolerate this deviation from ISA spec at essentially no cost
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default: begin
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default: begin
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s_id_s1 = 32'hxxxxxxxx;
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s_id_s1 = 32'hxxxxxxxx;
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s_id_s2 = 32'hxxxxxxxx;
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s_id_s2 = 32'hxxxxxxxx;
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@ -312,10 +312,10 @@ always @(*) begin
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s_ex_alu_out = s_ex_data1 << s_ex_data2;
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s_ex_alu_out = s_ex_data1 << s_ex_data2;
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end
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end
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ALUOP_SRL: begin
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ALUOP_SRL: begin
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s_ex_alu_out = s_ex_data1 >> s_ex_data2;
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s_ex_alu_out = s_ex_data1 >> s_ex_data2[5:0]; // NOTE: shamt is only 5 bits. Increased for gcc support
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end
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end
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ALUOP_SRA: begin
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ALUOP_SRA: begin
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s_ex_alu_out = s_ex_data1 >>> s_ex_data2;
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s_ex_alu_out = $signed(s_ex_data1) >>> s_ex_data2[5:0]; // NOTE: shamt is only 5 bits. Increased for gcc support
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end
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end
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ALUOP_SLT: begin
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ALUOP_SLT: begin
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s_ex_alu_out = $signed(s_ex_data1) < $signed(s_ex_data2);
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s_ex_alu_out = $signed(s_ex_data1) < $signed(s_ex_data2);
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53
test/test.S
53
test/test.S
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@ -8,9 +8,6 @@ _start:
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# JAL
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# JAL
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# JALR
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# JALR
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# SLLI
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# SRLI
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# SRAI
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# SLTI
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# SLTI
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# SLTUI
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# SLTUI
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@ -21,43 +18,43 @@ _start:
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# SLTU
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# SLTU
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# lui
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# lui
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lui x1, 0xfedcb # x1 = 0xfedcb000
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lui x1, 0xfedcb # x1 = 0xfedcb000
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nop
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nop
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nop
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nop
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nop
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nop
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# addi
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# addi
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addi x1, x1, 0x789 # x1 = 0xfedcb789
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addi x1, x1, 0x789 # x1 = 0xfedcb789
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addi x2, x0, -1 # x2 = 0xffffffff
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addi x2, x0, -1 # x2 = 0xffffffff
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nop
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nop
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nop
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nop
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addi x3, x1, -0x777 # x3 = 0xfedcb012
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addi x3, x1, -0x777 # x3 = 0xfedcb012
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nop
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nop
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nop
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nop
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nop
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nop
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# add
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# add
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add x4, x1, x2 # x4 = 0xfedcb788
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add x4, x1, x2 # x4 = 0xfedcb788
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nop
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nop
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nop
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nop
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nop
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nop
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# sub
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# sub
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sub x5, x1, x3 # x5 = 0x00000777
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sub x5, x1, x3 # x5 = 0x00000777
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nop
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nop
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nop
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nop
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nop
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nop
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# and
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# and
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and x6, x1, x2 # x6 = 0xfedcb789
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and x6, x1, x2 # x6 = 0xfedcb789
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and x7, x1, x0 # x7 = 0x00000000
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and x7, x1, x0 # x7 = 0x00000000
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and x8, x4, x3 # x8 = 0xfedcb000
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and x8, x4, x3 # x8 = 0xfedcb000
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nop
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nop
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nop
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nop
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nop
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nop
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# or
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# or
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or x9, x1, x2 # x9 = 0xffffffff
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or x9, x1, x2 # x9 = 0xffffffff
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or x10, x1, x0 # x10 = 0xfedcb789
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or x10, x1, x0 # x10 = 0xfedcb789
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or x11, x4, x3 # x11 = 0x0xfedcb79a
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or x11, x4, x3 # x11 = 0x0xfedcb79a
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nop
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nop
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@ -96,18 +93,44 @@ _start:
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nop
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nop
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nop
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nop
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# slli
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slli x24, x23, 4 # x24 = 0x00007880
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slli x25, x2, 1 # x25 = 0xfffffffe
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slli x26, x2, 63 # x26 = 0x00000000 // NOTE: I would expect GCC to throw an error here. It tolerates up to 63 bit shift despite assembling for 32b
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slli x27, x2, 31 # x27 = 0x80000000
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nop
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nop
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nop
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# srli
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srli x28, x23, 4 # x28 = 0x00000078
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srli x29, x2, 1 # x29 = 0x7fffffff
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srli x30, x2, 63 # x30 = 0x00000000 // NOTE: I would expect GCC to throw an error here. It tolerates up to 63 bit shift despite assembling for 32b
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srli x3, x2, 31 # x3 = 0x00000001
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nop
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nop
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nop
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# srai
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srai x4, x23, 4 # x4 = 0x00000078 // fails
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srai x5, x2, 1 # x5 = 0xffffffff
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srai x6, x2, 63 # x6 = 0xffffffff // NOTE: I would expect GCC to throw an error here. It tolerates up to 63 bit shift despite assembling for 32b
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srai x7, x2, 31 # x7 = 0xffffffff
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nop
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nop
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nop
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# counter and infinite loop
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# counter and infinite loop
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nop
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nop
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nop
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nop
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nop
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nop
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addi x31, x0, 1 # x1 = 1
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addi x31, x0, 1 # x1 = 1
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loop:
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loop:
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nop
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nop
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nop
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nop
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nop
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nop
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addi x31, x31, 1 # increment x1
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addi x31, x31, 1 # increment x1
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nop
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nop
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nop
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nop
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nop
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nop
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