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https://gitlab.com/brendanhaines/cpu.git
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switch to rv32i compiler
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parent
cb10d24050
commit
8b60773d2b
1
.gitignore
vendored
1
.gitignore
vendored
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@ -1 +1,2 @@
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build/
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*.~lock*
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*.~lock*
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@ -12,8 +12,8 @@ OBJ = $(notdir $(SOURCE_AS:.S=.o))
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OBJ += $(notdir $(SOURCE_C:.c=.o))
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OBJ += $(notdir $(SOURCE_C:.c=.o))
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CC = riscv64-linux-gnu-gcc-8
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CC = riscv64-linux-gnu-gcc-8
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# CFLAGS = -march=rv32i -mabi=ilp32
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CFLAGS = -march=rv32i -mabi=ilp32
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CFLAGS = -march=rv64i -mabi=lp64
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# CFLAGS = -march=rv64i -mabi=lp64
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CPPFLAGS =
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CPPFLAGS =
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@ -21,7 +21,7 @@ AS = riscv64-linux-gnu-as
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ASFLAGS = $(CFLAGS)
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ASFLAGS = $(CFLAGS)
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LD = riscv64-linux-gnu-ld
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LD = riscv64-linux-gnu-ld
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LDFLAGS = -T
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LDFLAGS = -melf32lriscv_ilp32
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# $(info $$TESTBENCH_V is [${TESTBENCH_V}])
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# $(info $$TESTBENCH_V is [${TESTBENCH_V}])
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@ -39,7 +39,7 @@ LDFLAGS = -T
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$(CC) $(CPPFLAGS) $(CFLAGS) $^ -o $@
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$(CC) $(CPPFLAGS) $(CFLAGS) $^ -o $@
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%.elf: %.ld $(OBJ)
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%.elf: %.ld $(OBJ)
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$(LD) $(LDFLAGS) $^ -o $@
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$(LD) $(LDFLAGS) -T $^ -o $@
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%.hex: %.elf
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%.hex: %.elf
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riscv64-linux-gnu-objcopy --target=verilog $< $@
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riscv64-linux-gnu-objcopy --target=verilog $< $@
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@ -50,19 +50,16 @@ _start:
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# slli
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# slli
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slli x24, x23, 4 # x24 = 0x00007880
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slli x24, x23, 4 # x24 = 0x00007880
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slli x25, x2, 1 # x25 = 0xfffffffe
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slli x25, x2, 1 # x25 = 0xfffffffe
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slli x26, x2, 63 # x26 = 0x80000000 # NOTE: gcc should not allow this since shamt is only 5 bits. discarding high bit so 63 = 31
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slli x27, x2, 31 # x27 = 0x80000000
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slli x27, x2, 31 # x27 = 0x80000000
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# srli
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# srli
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srli x28, x23, 4 # x28 = 0x00000078
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srli x28, x23, 4 # x28 = 0x00000078
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srli x29, x2, 1 # x29 = 0x7fffffff
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srli x29, x2, 1 # x29 = 0x7fffffff
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srli x30, x2, 63 # x30 = 0x00000001 # NOTE: gcc should not allow this since shamt is only 5 bits. discarding high bit so 63 = 31
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srli x3, x2, 31 # x3 = 0x00000001
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srli x3, x2, 31 # x3 = 0x00000001
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# srai
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# srai
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srai x4, x23, 4 # x4 = 0x00000078
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srai x4, x23, 4 # x4 = 0x00000078
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srai x5, x2, 1 # x5 = 0xffffffff
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srai x5, x2, 1 # x5 = 0xffffffff
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srai x6, x2, 63 # x6 = 0xffffffff # NOTE: gcc should not allow this since shamt is only 5 bits. discarding high bit so 63 = 31
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srai x7, x2, 31 # x7 = 0xffffffff
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srai x7, x2, 31 # x7 = 0xffffffff
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# sll
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# sll
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