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Brendan Haines 2023-01-23 18:26:14 -07:00
parent 71bc903f14
commit 51103c378d
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lib/axil_wb_bridge.sv
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@ -7,7 +7,7 @@ module axil_wb_bridge #(
input logic clk, input logic clk,
input logic reset, input logic reset,
///// AXI4-Lite ///// ///// AXI4-Lite Slave /////
// Write address // Write address
input logic axil_awvalid, input logic axil_awvalid,