diff --git a/lib/axil_wb_bridge.sv b/lib/axil_wb_bridge.sv
index aa6cb3a..2029d54 100644
--- a/lib/axil_wb_bridge.sv
+++ b/lib/axil_wb_bridge.sv
@@ -7,7 +7,7 @@ module axil_wb_bridge #(
     input logic clk,
     input logic reset,
 
-    ///// AXI4-Lite /////
+    ///// AXI4-Lite Slave /////
 
     // Write address
     input logic axil_awvalid,