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sub, and, or don't always work

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This commit is contained in:
Brendan Haines 2020-10-03 13:49:14 -06:00
parent 18892acec9
commit 3fbd96ca27
3 changed files with 104 additions and 61 deletions
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6
hdl/core.v
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@ -244,13 +244,13 @@ always @(*) begin
s_ex_alu_out = s_ex_data1 + (s_ex_data2 ^ {32{r_ex_alu_seed}}) + r_ex_alu_seed; s_ex_alu_out = s_ex_data1 + (s_ex_data2 ^ {32{r_ex_alu_seed}}) + r_ex_alu_seed;
end end
ALUOP_XOR: begin ALUOP_XOR: begin
s_ex_alu_out = (|s_ex_data1) ^ (|s_ex_data2); s_ex_alu_out = s_ex_data1 ^ s_ex_data2;
end end
ALUOP_OR: begin ALUOP_OR: begin
s_ex_alu_out = (|s_ex_data1) | (|s_ex_data2); s_ex_alu_out = s_ex_data1 | s_ex_data2;
end end
ALUOP_AND: begin ALUOP_AND: begin
s_ex_alu_out = (|s_ex_data1) & (|s_ex_data2); s_ex_alu_out = s_ex_data1 & s_ex_data2;
end end
ALUOP_SL: begin ALUOP_SL: begin
s_ex_alu_out = s_ex_data1 << s_ex_data2; s_ex_alu_out = s_ex_data1 << s_ex_data2;

2
test/Makefile
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@ -2,7 +2,7 @@ all: test.hex
CC = riscv64-linux-gnu-gcc CC = riscv64-linux-gnu-gcc
# CFLAGS = -march=rv32i -mabi=ilp32 # CFLAGS = -march=rv32i -mabi=ilp32
CFLAGS = -march=rv64i -mabi=lp64 CFLAGS = -march=rv64i -mabi=lp64 -o0
AS = riscv64-linux-gnu-as AS = riscv64-linux-gnu-as
ASFLAGS = $(CFLAGS) ASFLAGS = $(CFLAGS)

157
test/test.S
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@ -1,64 +1,107 @@
.global _start .global _start
.text .text
_start: _start:
add x1, x0, x0 add x1, x0, x0
add x2, x0, x0 add x2, x0, x0
add x3, x0, x0 add x3, x0, x0
add x4, x0, x0 add x4, x0, x0
add x5, x0, x0 add x5, x0, x0
add x6, x0, x0 add x6, x0, x0
add x7, x0, x0 add x7, x0, x0
add x8, x0, x0 add x8, x0, x0
add x9, x0, x0 add x9, x0, x0
add x10, x0, x0 add x10, x0, x0
add x11, x0, x0 add x11, x0, x0
add x12, x0, x0 add x12, x0, x0
add x13, x0, x0 add x13, x0, x0
add x14, x0, x0 add x14, x0, x0
add x15, x0, x0 add x15, x0, x0
add x16, x0, x0 add x16, x0, x0
add x17, x0, x0 add x17, x0, x0
add x18, x0, x0 add x18, x0, x0
add x19, x0, x0 add x19, x0, x0
add x20, x0, x0 add x20, x0, x0
add x21, x0, x0 add x21, x0, x0
add x22, x0, x0 add x22, x0, x0
add x23, x0, x0 add x23, x0, x0
add x24, x0, x0 add x24, x0, x0
add x25, x0, x0 add x25, x0, x0
add x26, x0, x0 add x26, x0, x0
add x27, x0, x0 add x27, x0, x0
add x28, x0, x0 add x28, x0, x0
add x29, x0, x0 add x29, x0, x0
add x30, x0, x0 add x30, x0, x0
add x31, x0, x0 add x31, x0, x0
# NOTE: nop required because cpu currently does not detect when something is needed from a later stage of the pipeline.
# 4 clocks allows one instruction to finish before the next starts
# lui
nop
nop
nop
lui x1, 0xfedcb # x1 = 0xfedcb000
# addi
nop
nop
nop
addi x1, x1, 0x789 # x1 = 0xfedcb789
addi x2, x0, -1 # x2 = 0xffffffff
nop
nop
addi x3, x1, -0x777 # x3 = 0xfedcb012
# add
nop
nop
nop
add x4, x1, x2 # x4 = 0xfedcb788
# sub
nop
nop
nop
add x5, x1, x3 # x5 = 0x00000777 incorrect
# and
nop
nop
nop
and x6, x1, x2 # x6 = 0xfedcb789
and x7, x1, x0 # x7 = 0x00000000
and x8, x4, x3 # x8 = 0xfedcb002 incorrect
# or
nop
nop
nop
or x9, x1, x2 # x9 = 0xffffffff
or x10, x1, x0 # x10 = 0xfedcb789
or x11, x4, x3 # x11 = 0x0xfedcb798 incorrect
nop
nop
nop
addi x31, x0, 1 # x1 = 1
# nop required because cpu currently does not detect when something is needed from a later stage of the pipeline.
# 5 clocks allows one instruction to finish before the next starts
nop
nop
nop
nop
nop
addi x1, x0, 0x12
nop
nop
nop
nop
nop
addi x2, x0, 0x11
nop
nop
nop
nop
nop
add x3, x2, x1
loop: loop:
nop nop
nop nop
nop nop
nop addi x31, x31, 1 # increment x1
nop nop
j loop nop
nop
j loop # loop forever
nop
nop
nop
nop
nop
nop
.data .data