fix the code issues I just introduced

This commit is contained in:
Brendan Haines 2021-07-02 02:39:43 -06:00
parent 0a9b182ef7
commit 17a95b58c8

View File

@ -72,7 +72,7 @@ always #2 clk = !clk;
core dut( core dut(
.clk(clk), .clk(clk),
.reset(reset) .reset(reset),
.mem_inst_addr(mem_inst_addr), .mem_inst_addr(mem_inst_addr),
.mem_inst_data(mem_inst_data), .mem_inst_data(mem_inst_data),