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fix the code issues I just introduced
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@ -72,7 +72,7 @@ always #2 clk = !clk;
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core dut(
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core dut(
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.clk(clk),
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.clk(clk),
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.reset(reset)
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.reset(reset),
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.mem_inst_addr(mem_inst_addr),
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.mem_inst_addr(mem_inst_addr),
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.mem_inst_data(mem_inst_data),
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.mem_inst_data(mem_inst_data),
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