brendanhaines/pluto_io_shield
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This commit is contained in:
Brendan Haines 2024-12-05 22:34:11 -07:00
commit 95a61bcfc7
15 changed files with 3328 additions and 0 deletions
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45
.github/workflows/kibot.yml vendored Normal file
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name: kibot
on: [push]
jobs:
erc:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v3
with:
submodules: recursive
ssh-strict: false
fetch-depth: 2
- uses: INTI-CMNB/KiBot@v2_k8
with:
config: config_erc.kibot.yaml
dir: output
drc:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v3
with:
submodules: recursive
ssh-strict: false
fetch-depth: 2
- uses: INTI-CMNB/KiBot@v2_k8
with:
config: config_drc.kibot.yaml
dir: output
generate_outputs:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v3
with:
submodules: recursive
fetch-depth: 2
- uses: INTI-CMNB/KiBot@v2_k8
with:
config: config.kibot.yaml
dir: output
- uses: actions/upload-artifact@v3
with:
name: output
path: output

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# kicad backup/cache files
*-backups
*.bak
~*.lck
fp-info-cache
# prerelease outputs directory
outputs

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[submodule "common_libraries"]
path = common_libraries
url = git@git.brendanhaines.com:brendanhaines/kicad.git

1
common_libraries Submodule

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Subproject commit fbdc8f452a8e5e72cb42ae5f8dd5b018994030ba

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# This is a working example.
# For a more complete reference use `--example`
kibot:
version: 1
global:
filters:
- number: 1007
- number: 1015
- number: 58
import:
- file: Elecrow
definitions:
_KIBOT_MANF_DIR: Manufacturers/Elecrow
- file: FusionPCB
definitions:
_KIBOT_MANF_DIR: Manufacturers/FusionPCB
- file: JLCPCB
definitions:
_KIBOT_MANF_DIR: Manufacturers/JLCPCB
_KIBOT_POS_PRE_TRANSFORM: '[''_kicost_rename'', ''_rot_footprint'']'
_KIBOT_BOM_ENABLED: 'false'
- file: MacroFab_XYRS
- file: PCBWay
definitions:
_KIBOT_MANF_DIR: Manufacturers/PCBWay
preflight:
set_text_variables:
- name: GIT_HASH
command: "git rev-parse --short HEAD"
- name: PCB_REVISION
command: 'if [ $GITHUB_REF_TYPE = tag ]; then echo "$GITHUB_REF_NAME"; else echo "UNRELEASED"; fi'
outputs:
- name: basic_boardview
comment: Board View export
type: boardview
dir: Assembly
- name: generic_bom_csv
comment: Generic Bill of Materials in CSV format
type: bom
dir: BoM/Generic
options:
format: CSV
columns:
- Row
- Description
- Part
- Part Lib
- References
- field: Value
join:
- voltage
- Footprint
- Footprint Lib
- Quantity Per PCB
- Build Quantity
- Status
- Datasheet
- Sheetpath
- Source BoM
- Reference
- Manufacturer
- ManufacturerPartNumber
- Supplier
- SupplierPartNumber
- Populate
- FieldName
- Voltage
- Precision
count_smd_tht: true
- name: positional_bom_html
comment: Positional Bill of Materials in HTML format
type: bom
dir: BoM/Positional
options:
format: HTML
columns: &id001
- Row
- Description
- Part
- Part Lib
- References
- Value
- Footprint
- Footprint Lib
- Quantity Per PCB
- Build Quantity
- Status
- Datasheet
- Sheetpath
- Source BoM
- Footprint X
- Footprint Y
- Footprint Rot
- Footprint Side
- Footprint Type
- Footprint Populate
- Footprint X-Size
- Footprint Y-Size
count_smd_tht: true
html:
style: modern-red
- name: positional_bom_xlsx
comment: Positional Bill of Materials in XLSX format
type: bom
dir: BoM/Positional
options:
format: XLSX
columns: *id001
count_smd_tht: true
xlsx:
style: modern-red
- name: costs_bom_xlsx
comment: Costs Bill of Materials in XLSX format
type: bom
dir: BoM/Costs
options:
format: XLSX
count_smd_tht: true
xlsx:
style: modern-green
kicost: true
specs: true
kicost_api_disable: KitSpace
pre_transform: _kicost_rename
# - name: basic_diff_pcb
# comment: PCB diff between the last two changes
# type: diff
# dir: diff
# layers:
# - layer: F.Cu
# suffix: F_Cu
# description: Front copper
# - layer: F.Paste
# suffix: F_Paste
# description: Front solder paste
# - layer: F.Silkscreen
# suffix: F_Silkscreen
# description: Front silkscreen (artwork)
# - layer: F.Mask
# suffix: F_Mask
# description: Front soldermask (negative)
# - layer: Edge.Cuts
# suffix: Edge_Cuts
# description: Board shape
# - layer: F.Courtyard
# suffix: F_Courtyard
# description: Front courtyard area
# - layer: F.Fab
# suffix: F_Fab
# description: Front documentation
# options:
# old: HEAD~
# old_type: git
# new: HEAD
# new_type: git
# add_link_id: true
# - name: basic_diff_sch
# comment: Schematic diff between the last two changes
# type: diff
# dir: diff
# options:
# old: HEAD~
# old_type: git
# new: HEAD
# new_type: git
# add_link_id: true
# pcb: false
- name: basic_download_datasheets
comment: Download the datasheets
type: download_datasheets
dir: Datasheets
- name: basic_excellon
comment: Drill files in EXCELLON format
type: excellon
dir: Gerbers_and_Drill
options:
map: pdf
- name: basic_gerb_drill
comment: Drill files in GERB_DRILL format
type: gerb_drill
dir: Gerbers_and_Drill
options:
map: gerber
- name: gerber_modern
comment: Gerbers in modern format, recommended by the standard
type: gerber
dir: Gerbers_and_Drill
layers:
- layer: F.Cu
suffix: F_Cu
description: Front copper
- layer: In1.Cu
suffix: In1_Cu
description: Inner layer 1 copper
- layer: In2.Cu
suffix: In2_Cu
description: Inner layer 2 copper
- layer: B.Cu
suffix: B_Cu
description: Back copper
- layer: F.Paste
suffix: F_Paste
description: Front solder paste
- layer: B.Paste
suffix: B_Paste
description: Back solder paste
- layer: F.Silkscreen
suffix: F_Silkscreen
description: Front silkscreen (artwork)
- layer: B.Silkscreen
suffix: B_Silkscreen
description: Back silkscreen (artwork)
- layer: F.Mask
suffix: F_Mask
description: Front soldermask (negative)
- layer: B.Mask
suffix: B_Mask
description: Back soldermask (negative)
- layer: Edge.Cuts
suffix: Edge_Cuts
description: Board shape
- layer: F.Courtyard
suffix: F_Courtyard
description: Front courtyard area
- layer: B.Courtyard
suffix: B_Courtyard
description: Back courtyard area
- layer: F.Fab
suffix: F_Fab
description: Front documentation
- layer: B.Fab
suffix: B_Fab
description: Back documentation
# - name: basic_ibom
# comment: Interactive HTML BoM
# type: ibom
# dir: Assembly
- name: basic_info
comment: Information about the run
type: info
dir: .
- name: basic_kicanvas
comment: Web page to browse the schematic and/or PCB
type: kicanvas
dir: Browse
options:
source:
- schematic
- pcb
- name: renderer_for_present
comment: Renderer for the presentation
type: pcbdraw
dir: Render_for_presentation
run_by_default: false
- name: gerbers_for_present
comment: Gerbers for the presentation
type: gerber
dir: Gerber_for_presentation
layers: copper
run_by_default: false
# - name: basic_kiri
# comment: Interactive diff between commits
# type: kiri
# dir: diff
# layers:
# - layer: F.Cu
# suffix: F_Cu
# description: Front copper
# - layer: F.Paste
# suffix: F_Paste
# description: Front solder paste
# - layer: F.Silkscreen
# suffix: F_Silkscreen
# description: Front silkscreen (artwork)
# - layer: F.Mask
# suffix: F_Mask
# description: Front soldermask (negative)
# - layer: Edge.Cuts
# suffix: Edge_Cuts
# description: Board shape
# - layer: F.Courtyard
# suffix: F_Courtyard
# description: Front courtyard area
# - layer: F.Fab
# suffix: F_Fab
# description: Front documentation
# options:
# max_commits: 4
- name: basic_navigate_results
comment: Web page to browse the results
type: navigate_results
dir: Browse
options:
link_from_root: index.html
skip_not_run: true
- name: ipc_netlist
comment: IPC-D-356 netlist for testing
type: netlist
dir: Export
options:
format: ipc
- name: basic_pcb_print_pdf
comment: PCB
type: pcb_print
dir: PCB/PDF
options:
format: PDF
pages:
- layers:
- layer: F.Cu
- layer: F.Mask
color: '#14332440'
- layer: F.Paste
- layer: F.Silkscreen
- layer: Edge.Cuts
sheet: Front copper
- layers:
- layer: B.Cu
- layer: B.Mask
color: '#14332440'
- layer: B.Paste
- layer: B.Silkscreen
- layer: Edge.Cuts
sheet: Back copper
- layers:
- layer: F.Courtyard
- layer: Edge.Cuts
sheet: Front courtyard area
- layers:
- layer: B.Courtyard
- layer: Edge.Cuts
sheet: Back courtyard area
- layers:
- layer: F.Fab
- layer: Edge.Cuts
sheet: Front documentation
- layers:
- layer: B.Fab
- layer: Edge.Cuts
sheet: Back documentation
keep_temporal_files: true
- name: render_2d_svg_top
type: pcbdraw
dir: PCB/2D_render/jlcpcb_green_enig
options:
style: jlcpcb-green-enig
format: svg
- name: render_2d_svg_bottom
type: pcbdraw
dir: PCB/2D_render/jlcpcb_green_enig
options:
style: jlcpcb-green-enig
format: svg
bottom: true
- name: render_2d_png_top
type: pcbdraw
dir: PCB/2D_render/jlcpcb_green_enig
options:
style: jlcpcb-green-enig
format: png
dpi: 1200
- name: render_2d_png_bottom
type: pcbdraw
dir: PCB/2D_render/jlcpcb_green_enig
options:
style: jlcpcb-green-enig
format: png
dpi: 1200
bottom: true
- name: basic_pdf_sch_print
comment: Schematic in PDF format
type: pdf_sch_print
dir: Schematic
- name: basic_position_ASCII
comment: Components position for Pick & Place
type: position
dir: Position
options:
format: ASCII
only_smd: false
separate_files_for_front_and_back: false
- name: basic_position_CSV
comment: Components position for Pick & Place
type: position
dir: Position
options:
format: CSV
only_smd: false
separate_files_for_front_and_back: false
- name: basic_render_3d_top
comment: 3D view from top
type: render_3d
dir: 3D
options:
ray_tracing: true
orthographic: true
# - name: basic_render_3d_30deg
# comment: 3D view from 30 degrees
# type: render_3d
# dir: 3D
# output_id: 30deg
# options:
# ray_tracing: true
# rotate_x: 3
# rotate_z: -2
- name: report_simple
comment: Simple design report
type: report
output_id: _simple
options:
template: simple_ASCII
do_convert: true
- name: report_full
comment: Full design report
type: report
options:
template: full_SVG
do_convert: true
- name: basic_step
comment: 3D model in STEP format
type: step
dir: 3D
...
definitions:
_KIBOT_MANF_DIR_COMP: Manufacturers
_KIBOT_GERBER_LAYERS: "- copper\n\
\ - F.SilkS\n\
\ - B.SilkS\n\
\ - F.Mask\n\
\ - B.Mask\n\
\ - F.Paste\n\
\ - B.Paste\n\
\ - Edge.Cuts"

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config_drc.kibot.yaml Normal file
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kibot:
version: 1
preflight:
drc: true

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config_erc.kibot.yaml Normal file
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kibot:
version: 1
preflight:
erc: true

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(fp_lib_table
(version 7)
(lib (name "common")(type "KiCad")(uri "${KIPRJMOD}/../common_libraries/common.pretty")(options "")(descr ""))
(lib (name "jst")(type "KiCad")(uri "${KIPRJMOD}/../common_libraries/jst.pretty")(options "")(descr ""))
(lib (name "molex")(type "KiCad")(uri "${KIPRJMOD}/../common_libraries/molex.pretty")(options "")(descr ""))
(lib (name "samtec")(type "KiCad")(uri "${KIPRJMOD}/../common_libraries/samtec.pretty")(options "")(descr ""))
)

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pluto_shield.kicad_dru Normal file
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(version 1)
(rule IgnoreSilkScreenGraphicOverlap
(condition "A.Type == 'Graphic' && B.Type == 'Graphic'")
(constraint silk_clearance)
(severity ignore)
)

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pluto_shield.kicad_pcb Normal file
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(kicad_pcb (version 20221018) (generator pcbnew)
(general
(thickness 1.6)
)
(paper "A")
(title_block
(title "${PROJECT_NAME}")
(rev "${PCB_REVISION}")
(company "BRENDANHAINES.COM")
)
(layers
(0 "F.Cu" signal)
(1 "In1.Cu" signal)
(2 "In2.Cu" signal)
(31 "B.Cu" signal)
(32 "B.Adhes" user "B.Adhesive")
(33 "F.Adhes" user "F.Adhesive")
(34 "B.Paste" user)
(35 "F.Paste" user)
(36 "B.SilkS" user "B.Silkscreen")
(37 "F.SilkS" user "F.Silkscreen")
(38 "B.Mask" user)
(39 "F.Mask" user)
(40 "Dwgs.User" user "User.Drawings")
(41 "Cmts.User" user "User.Comments")
(42 "Eco1.User" user "User.Eco1")
(43 "Eco2.User" user "User.Eco2")
(44 "Edge.Cuts" user)
(45 "Margin" user)
(46 "B.CrtYd" user "B.Courtyard")
(47 "F.CrtYd" user "F.Courtyard")
(48 "B.Fab" user)
(49 "F.Fab" user)
(50 "User.1" user)
(51 "User.2" user)
(52 "User.3" user)
(53 "User.4" user)
(54 "User.5" user)
(55 "User.6" user)
(56 "User.7" user)
(57 "User.8" user)
(58 "User.9" user)
)
(setup
(stackup
(layer "F.SilkS" (type "Top Silk Screen") (color "White"))
(layer "F.Paste" (type "Top Solder Paste"))
(layer "F.Mask" (type "Top Solder Mask") (color "Green") (thickness 0.01))
(layer "F.Cu" (type "copper") (thickness 0.035))
(layer "dielectric 1" (type "core") (thickness 0.48) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
(layer "In1.Cu" (type "copper") (thickness 0.035))
(layer "dielectric 2" (type "prepreg") (thickness 0.48) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
(layer "In2.Cu" (type "copper") (thickness 0.035))
(layer "dielectric 3" (type "core") (thickness 0.48) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
(layer "B.Cu" (type "copper") (thickness 0.035))
(layer "B.Mask" (type "Bottom Solder Mask") (color "Green") (thickness 0.01))
(layer "B.Paste" (type "Bottom Solder Paste"))
(layer "B.SilkS" (type "Bottom Silk Screen") (color "White"))
(copper_finish "ENIG")
(dielectric_constraints no)
)
(pad_to_mask_clearance 0)
(pcbplotparams
(layerselection 0x00010fc_ffffffff)
(plot_on_all_layers_selection 0x0000000_00000000)
(disableapertmacros false)
(usegerberextensions false)
(usegerberattributes true)
(usegerberadvancedattributes true)
(creategerberjobfile true)
(dashed_line_dash_ratio 12.000000)
(dashed_line_gap_ratio 3.000000)
(svgprecision 4)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15.000000)
(dxfpolygonmode true)
(dxfimperialunits true)
(dxfusepcbnewfont true)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(sketchpadsonfab false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory "")
)
)
(property "PCB_REVISION" "0.0")
(property "PROJECT_NAME" "PROJECT_NAME")
(net 0 "")
(net 1 "GND")
(footprint "common:MH120X230_#4" (layer "F.Cu")
(tstamp 0ed882a0-e4ce-4f18-bef6-9c3cccbc2678)
(at 123.19 123.19)
(descr "Mounting Hole, #4")
(property "Sheetfile" "jlcpcb_template.kicad_sch")
(property "Sheetname" "")
(property "ki_description" "Hole")
(path "/79801d06-18e7-498c-8d4e-cc6cc5060c9d")
(zone_connect 2)
(attr exclude_from_pos_files)
(fp_text reference "MH3" (at 0 0) (layer "F.SilkS") hide
(effects (font (size 0.762 0.762) (thickness 0.127)))
(tstamp 14ecb36f-08db-4212-9cc8-01cdb58e47f7)
)
(fp_text value "Mounting_Hole" (at 0 0) (layer "F.Fab") hide
(effects (font (size 0.762 0.762) (thickness 0.127)))
(tstamp 27613306-b783-4cb9-acf3-88e3b21dd5a5)
)
(fp_circle (center 0 0) (end 3.175 0)
(stroke (width 0.1778) (type solid)) (fill none) (layer "F.SilkS") (tstamp ae932b76-a5d5-4332-9618-4f8af0eeca49))
(pad "1" thru_hole circle (at 0 0) (size 5.842 5.842) (drill 3.048) (layers "*.Cu" "*.Mask")
(net 1 "GND") (pinfunction "1") (pintype "passive") (zone_connect 2) (tstamp 706a15cb-e926-49ae-94cd-c84e7fda89cd))
)
(footprint "common:LOGO_BH" (layer "F.Cu")
(tstamp 2c2034ad-58b7-4a90-9915-abf69702fa36)
(at 99.06 116.84)
(property "Sheetfile" "jlcpcb_template.kicad_sch")
(property "Sheetname" "")
(property "exclude_from_bom" "")
(path "/34f9aa7c-9331-4a4e-ada5-723181f4dcaa")
(attr smd exclude_from_pos_files exclude_from_bom allow_missing_courtyard)
(fp_text reference "LOGO1" (at 0 -0.3175 unlocked) (layer "F.SilkS") hide
(effects (font (size 0.635 0.635) (thickness 0.127)))
(tstamp a9243f51-eda4-4f1b-a757-cd7225d8ae98)
)
(fp_text value "~" (at 0 0.635 unlocked) (layer "F.Fab") hide
(effects (font (size 0.635 0.635) (thickness 0.127)))
(tstamp 8e493312-c025-4c71-8e0c-010a596ed2b6)
)
(fp_poly
(pts
(xy 0.340334 -4.906285)
(xy 0.426334 -4.89815)
(xy 0.511644 -4.88464)
(xy 0.595939 -4.865795)
(xy 0.678894 -4.8417)
(xy 0.760165 -4.81244)
(xy 0.839439 -4.778135)
(xy 0.916405 -4.73892)
(xy 0.990754 -4.69495)
(xy 1.062204 -4.646395)
(xy 1.130454 -4.59345)
(xy 1.195245 -4.536325)
(xy 1.256325 -4.475245)
(xy 1.313449 -4.410455)
(xy 1.366394 -4.342205)
(xy 1.414949 -4.270755)
(xy 1.45892 -4.196405)
(xy 1.498135 -4.11944)
(xy 1.532439 -4.040165)
(xy 1.561699 -3.958895)
(xy 1.585795 -3.87594)
(xy 1.60464 -3.791645)
(xy 1.61815 -3.706335)
(xy 1.626285 -3.620335)
(xy 1.629 -3.534)
(xy 1.626285 -3.447665)
(xy 1.61815 -3.361665)
(xy 1.60464 -3.276355)
(xy 1.585795 -3.19206)
(xy 1.561699 -3.109105)
(xy 1.532439 -3.027835)
(xy 1.498135 -2.94856)
(xy 1.45892 -2.871594)
(xy 1.414949 -2.797245)
(xy 1.366395 -2.725796)
(xy 1.31345 -2.657543)
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(xy 1.130455 -2.474552)
(xy 1.062205 -2.421604)
(xy 0.990755 -2.373051)
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(xy 0.760165 -2.255558)
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(xy 0.340335 -2.161717)
(xy 0.254 -2.159)
(xy 0.254 -0.909001)
(xy -0.246 -0.909001)
(xy -0.246 -2.159)
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(xy -0.996 -0.909001)
(xy -1.496 -0.909001)
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(xy 0.254 -3.909)
(xy 0.254 -2.659)
(xy 0.30894 -2.660733)
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(xy 0.417955 -2.674503)
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(xy 0.524385 -2.701832)
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(xy 0.768305 -2.826115)
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(xy 0.852975 -2.89616)
(xy 0.89184 -2.935025)
(xy 0.928195 -2.97626)
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(xy 0.992785 -3.06516)
(xy 1.02076 -3.11247)
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(xy 1.08617 -3.263615)
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2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2
]
],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"conflicting_netclasses": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"endpoint_off_grid": "warning",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"missing_bidi_pin": "warning",
"missing_input_pin": "warning",
"missing_power_pin": "error",
"missing_unit": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "error",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"simulation_model_issue": "error",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "pluto_shield.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12,
"clearance": 0.127,
"diff_pair_gap": 0.127,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.127,
"line_style": 0,
"microvia_diameter": 0.508,
"microvia_drill": 0.254,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.127,
"via_diameter": 0.508,
"via_drill": 0.254,
"wire_width": 6
}
],
"meta": {
"version": 3
},
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": []
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"plot": "",
"pos_files": "",
"specctra_dsn": "",
"step": "",
"svg": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"bom_export_filename": "",
"bom_fmt_presets": [],
"bom_fmt_settings": {
"field_delimiter": ",",
"keep_line_breaks": false,
"keep_tabs": false,
"name": "CSV",
"ref_delimiter": ",",
"ref_range_delimiter": "",
"string_delimiter": "\""
},
"bom_presets": [],
"bom_settings": {
"exclude_dnp": false,
"fields_ordered": [
{
"group_by": false,
"label": "Reference",
"name": "Reference",
"show": true
},
{
"group_by": true,
"label": "Value",
"name": "Value",
"show": true
},
{
"group_by": false,
"label": "Datasheet",
"name": "Datasheet",
"show": true
},
{
"group_by": false,
"label": "Footprint",
"name": "Footprint",
"show": true
},
{
"group_by": false,
"label": "Qty",
"name": "${QUANTITY}",
"show": true
},
{
"group_by": true,
"label": "DNP",
"name": "${DNP}",
"show": true
}
],
"filter_string": "",
"group_symbols": true,
"name": "Grouped By Value",
"sort_asc": true,
"sort_field": "Reference"
},
"connection_grid_size": 50.0,
"drawing": {
"dashed_lines_dash_length_ratio": 12.0,
"dashed_lines_gap_length_ratio": 3.0,
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.375,
"operating_point_overlay_i_precision": 3,
"operating_point_overlay_i_range": "~A",
"operating_point_overlay_v_precision": 3,
"operating_point_overlay_v_range": "~V",
"overbar_offset_ratio": 1.23,
"pin_symbol_size": 25.0,
"text_offset_ratio": 0.15
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "",
"page_layout_descr_file": "",
"plot_directory": "",
"spice_current_sheet_as_root": false,
"spice_external_command": "spice \"%I\"",
"spice_model_current_sheet_as_root": true,
"spice_save_all_currents": false,
"spice_save_all_dissipations": false,
"spice_save_all_voltages": false,
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"5c9b5493-28d5-442a-a1c0-43be0cca0b1b",
"Root"
]
],
"text_variables": {
"PCB_REVISION": "0.0",
"PROJECT_NAME": "PROJECT_NAME"
}
}

1470
pluto_shield.kicad_sch Normal file
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186
release.py Normal file
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@ -0,0 +1,186 @@
# %% Imports
import shutil
import subprocess
import zipfile
from pathlib import Path
# %% Find the relevant files
projects = list(Path(__file__).parent.glob("*.kicad_pro"))
if len(projects) == 1:
root_project = projects[0].resolve()
else:
raise NotImplementedError("Need to determine which project is the root one (when multiple exist for sim)")
project_name = root_project.stem
dir_out = root_project.parent / "outputs"
if dir_out.exists():
shutil.rmtree(str(dir_out))
dir_out.mkdir(parents=True)
print(f"Writing outputs to {dir_out}")
# %% Verify state of repository
# TODO: check if repo is committed and pushed or if we're in CI
# %% Check Kicad version
kicad_version = subprocess.run(["kicad-cli", "version"], capture_output=True, check=True).stdout.decode()
major, minor, patch = kicad_version.split(".")
if int(major) < 7:
raise ValueError(f"Requires minimum Kicad version 7.0.0 buf found {kicad_version}")
# %% General documentation PDFs
subprocess.run(
[
"kicad-cli",
"sch",
"export",
"pdf",
str(root_project.with_suffix(".kicad_sch")),
"-o",
str(dir_out / f"{project_name}_schematic.pdf"),
],
check=True,
)
subprocess.run(
[
"kicad-cli",
"pcb",
"export",
"pdf",
str(root_project.with_suffix(".kicad_pcb")),
"-o",
str(dir_out / f"{project_name}_fabrication_drawing.pdf"),
"--include-border-title",
"--layers",
",".join(["Edge.Cuts", "F.Cu", "F.Mask", "F.Silkscreen", "F.Fab"]),
],
check=True,
)
subprocess.run(
[
"kicad-cli",
"pcb",
"export",
"step",
str(root_project.with_suffix(".kicad_pcb")),
"-o",
str(dir_out / f"{project_name}.step"),
"--subst-models",
"--no-virtual", # TODO: decide if I want virtual models. I might just generate both
],
check=True,
)
# %% Fabrication Files
dir_gerber = dir_out / f"{project_name}_gerbers"
dir_gerber.mkdir(exist_ok=True)
subprocess.run(
[
"kicad-cli",
"pcb",
"export",
"gerbers",
str(root_project.with_suffix(".kicad_pcb")),
"-o",
str(dir_gerber),
],
check=True,
)
subprocess.run(
[
"kicad-cli",
"pcb",
"export",
"drill",
str(root_project.with_suffix(".kicad_pcb")),
"--separate-files",
"--generate-map", # not necessary but kinda nice since I can't nicely make a drill table in the main pdf
# "-o", # -0 flag is not working so I'm just using cwd instead
# str(dir_gerber),
],
cwd=str(dir_gerber.resolve()),
check=True,
)
# TODO: add version strings to every single filename
# %% Zip up the gerbers
with zipfile.ZipFile(dir_gerber.with_suffix(".zip"), "w") as z:
for f in dir_gerber.glob("*"):
z.write(f, f.name)
# %% Assembly files
# Assembly Drawing
subprocess.run(
[
"kicad-cli",
"pcb",
"export",
"pdf",
str(root_project.with_suffix(".kicad_pcb")),
"-o",
str(dir_out / f"{project_name}_assembly_drawing.pdf"),
"--include-border-title",
"--layers",
",".join(["Edge.Cuts", "F.Mask", "F.Silkscreen", "F.Fab"]),
],
check=True,
)
# Position Files
subprocess.run(
[
"kicad-cli",
"pcb",
"export",
"pos",
str(root_project.with_suffix(".kicad_pcb")),
"-o",
str(dir_out / f"{project_name}.pos"),
"--format",
"ascii",
"--side",
"both",
],
check=True,
)
# BOM
subprocess.run(
[
"kicad-cli",
"sch",
"export",
"python-bom",
str(root_project.with_suffix(".kicad_sch")),
"-o",
str(dir_out / f"{project_name}_bom.xml"),
],
check=True,
)
subprocess.run(
[
"python3",
"/home/brendan/Documents/projects/bhht/common_libraries/plugins/bom_csv_grouped_extra.py", # TODO: move this
str(dir_out / f"{project_name}_bom.xml"),
str(dir_out / f"{project_name}_bom.csv"),
],
check=True,
)
# # Interactive BOM
# subprocess.run(
# [
# "python3",
# "path/to/InteractiveHtmlBom/generate_interactive_bom.py", # TODO: locate this somewhere reasonable
# str(root_project.with_suffix(".kicad_pcb")),
# ],
# check=True,
# )

4
sym-lib-table Normal file
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(sym_lib_table
(version 7)
(lib (name "bh")(type "KiCad")(uri "${KIPRJMOD}/common_libraries/bh.kicad_sym")(options "")(descr ""))
)