add simulation models for opa810

This commit is contained in:
Brendan Haines 2024-06-15 09:19:04 -06:00
parent 288befd8f5
commit fc68d63979
13 changed files with 897 additions and 0 deletions

Binary file not shown.

View File

@ -0,0 +1,356 @@
* OPA810 - Rev. A
* Created by Sean Cashin; 2020-06-11
* Created with Green-Williams-Lis Current Sense Amp Macro-model Architecture
* Copyright 2020 by Texas Instruments Corporation
******************************************************
* MACRO-MODEL SIMULATED PARAMETERS:
******************************************************
* AC PARAMETERS
**********************
* CLOSED-LOOP OUTPUT IMPEDANCE VS. FREQUENCY (Zout vs. Freq.)
* CLOSED-LOOP GAIN AND PHASE VS. FREQUENCY WITH RL, CL EFFECTS (Acl vs. Freq.)
* COMMON-MODE REJECTION RATIO VS. FREQUENCY (CMRR vs. Freq.)
* POWER SUPPLY REJECTION RATIO VS. FREQUENCY (PSRR vs. Freq.)
* INPUT VOLTAGE NOISE DENSITY VS. FREQUENCY (en vs. Freq.)
**********************
* DC PARAMETERS
**********************
* INPUT COMMON-MODE VOLTAGE RANGE (Vcm)
* GAIN ERROR (Eg)
* INPUT BIAS CURRENT VS. INPUT COMMON-MODE VOLTAGE (Ib vs. Vcm)
* INPUT OFFSET VOLTAGE VS. TEMPERATURE (Vos vs. Temp)
* OUTPUT VOLTAGE SWING vs. OUTPUT CURRENT (Vout vs. Iout)
* SHORT-CIRCUIT OUTPUT CURRENT (Isc)
* QUIESCENT CURRENT (Iq)
**********************
* TRANSIENT PARAMETERS
**********************
* SLEW RATE (SR)
* SETTLING TIME VS. CAPACITIVE LOAD (ts)
* OVERLOAD RECOVERY TIME (tor)
******************************************************
.subckt OPA810 IN+ IN- OUT VCC VEE
******************************************************
.MODEL R_NOISE RES (T_ABS=0)
.MODEL R_NOISELESS RES (T_ABS=-273.15)
C_C12 MID N45892 1E-15
C_C13 N45974 MID 1E-15
C_C17 MID N68747 1E-12
C_C18 MID N68594 1E-12
C_C19 MID SW_OL_OPA810 1E-12
C_C1A N725398 N725428 15.92E-6
C_C1A1 N701935 N701965 3.537P
C_C1A10 N789898 N789912 342.3F
C_C1A4 N709083 N709113 63.66N
C_C1A9 N704975 N705005 83.77N
C_C1C1 N821901 N725762 159.2E-9
C_C1C3 N725214 N725836 26.53E-15
C_C1D MID N725708 93.62E-15
C_C1_0 MID N79181 23.5E-9
C_C2 MID N694641 740E-12
C_C3 MID N694487 740E-12
C_C33 N406634 0 1E-15
C_C34 N317950 0 1
C_C35 N406794 0 1E-15
C_C36 N894736 N892256 227.4E-12
C_C7 N31014 MID 1E-15
C_C8 MID N35813 1E-15
C_C9 MID N38096 1E-15
C_C_CMN MID ESDN 2.5E-12
C_C_CMP ESDP MID 2.5E-12
C_C_DIFF ESDN ESDP 0.5E-12
C_C_VCLP VCLP MID 1E-12
C_C_VIMON MID VIMON 1E-9
C_C_VOUT_S MID VOUT_S 1E-9
E_E2 N91498 MID CL_CLAMP MID 1
E_E3 N112292 MID OUT MID 1
E_E6 MID 0 N317950 0 1
G_G1 N725398 MID CL_CLAMP N516723 -90.91
G_G10 N73852 MID N55875 MID -1
G_G11 N55050 MID N56119 MID -1
G_G16 CL_CLAMP MID N894736 MID -1E-3
G_G2 N10570 N10561 N701965 MID -1E-3
G_G36 VCC_B 0 VCC 0 -1
G_G37 VEE_B 0 VEE 0 -1
G_G54 N694641 MID N79181 MID -1
G_G55 N701935 MID N789912 MID -222.22
G_G56 N709083 MID VCC_B MID -1.265
G_G58 N704975 MID VEE_B MID -1.664
G_G59 N789898 MID ESDP MID -29.75M
G_G6 N25816 N11984 N709113 N705005 -1E-3
G_G60 N06456 MID N799160 MID -10E-6
G_G61 ESDN MID N804105 MID -10E-6
G_G62 N821901 MID N725428 MID -100
G_G63 N892256 MID N694487 MID -1.3
G_G7 N694487 MID N694641 MID -1
G_G8 VCC_CLP MID N35813 MID -1E-3
G_G9 VEE_CLP MID N38096 MID -1E-3
G_GB N725346 MID N725762 MID -25
G_GD4 N725214 MID N725574 MID -0.3
G_GD5 N725936 MID N725836 MID -166.7
I_I_B N06456 MID DC 2E-12
I_I_OS ESDN MID DC 1E-12
I_I_Q VCC VEE DC 1.9E-3
R_R1 ESDP IN+ R_NOISELESS 10E-3
R_R10 ESDN N11991 R_NOISELESS 1E-3
R_R107 VCC_B 0 R_NOISELESS 1
R_R108 N317950 0 R_NOISELESS 1E12
R_R109 VEE_B 0 R_NOISELESS 1
R_R11 MID N725346 R_NOISELESS 1
R_R110 VCC_B N406634 R_NOISELESS 1E-3
R_R111 N406634 N317950 R_NOISELESS 1E6
R_R112 N317950 N406794 R_NOISELESS 1E6
R_R113 N406794 VEE_B R_NOISELESS 1E-3
R_R133 N694487 MID R_NOISELESS 1
R_R134 N694641 MID R_NOISELESS 1
R_R135 N701935 MID R_NOISELESS 1
R_R136 N704975 MID R_NOISELESS 1
R_R137 MID N725398 R_NOISELESS 1
R_R139 MID N725214 R_NOISELESS 1
R_R140 MID N725936 R_NOISELESS 1
R_R141 N789898 MID R_NOISELESS 1
R_R145 MID N821901 R_NOISELESS 1
R_R149 N892256 MID R_NOISELESS 1
R_R150 N894736 MID R_NOISELESS 33.3
R_R151 N892256 N894736 R_NOISELESS 10
R_R1A N725428 N725398 R_NOISELESS 10E3
R_R1A1 N701935 N701965 R_NOISELESS 1E4
R_R1A10 N789898 N789912 R_NOISELESS 1E8
R_R1A11 MID N799160 R_NOISE 15
R_R1A12 MID N804105 R_NOISE 15
R_R1A3 N704975 N705005 R_NOISELESS 1E8
R_R1A4 N709083 N709113 R_NOISELESS 1E8
R_R1C1 N725762 N821901 R_NOISELESS 10E3
R_R1C2 N725836 N725214 R_NOISELESS 1E4
R_R1D1 N725708 N725574 R_NOISELESS 10E3
R_R2 ESDN IN- R_NOISELESS 10E-3
R_R21 N11984 N25816 R_NOISELESS 1E3
R_R25 MID N28602 R_NOISELESS 1E9
R_R26 N30136 MID R_NOISELESS 1E9
R_R27 MID N30913 R_NOISELESS 1
R_R28 N31014 N30913 R_NOISELESS 1E-3
R_R29 N35669 VCC_B R_NOISELESS 1E3
R_R2A1 N701965 MID R_NOISELESS 45.2
R_R2A10 N705005 MID R_NOISELESS 19M
R_R2A11 N789912 MID R_NOISELESS 465
R_R2A13 MID N725428 R_NOISELESS 101
R_R2A4 N709113 MID R_NOISELESS 25M
R_R2C1 MID N725762 R_NOISELESS 416.7
R_R2C3 MID N725836 R_NOISELESS 60.36
R_R2D N725574 N725346 R_NOISELESS 367.8E3
R_R3 MID ESDP R_NOISELESS 1E12
R_R30 N35813 N35669 R_NOISELESS 1E-3
R_R31 VCC_CLP MID R_NOISELESS 1E3
R_R32 N38050 VEE_B R_NOISELESS 1E3
R_R33 N38096 N38050 R_NOISELESS 1E-3
R_R34 VEE_CLP MID R_NOISELESS 1E3
R_R4 ESDN MID R_NOISELESS 1E12
R_R41 MID N50645 R_NOISELESS 1E9
R_R42 N45856 MID R_NOISELESS 1
R_R43 N45892 N45856 R_NOISELESS 1E-3
R_R44 N45974 N45986 R_NOISELESS 1E-3
R_R45 MID N45986 R_NOISELESS 1
R_R46 MID N48550 R_NOISELESS 1E9
R_R47 MID N73852 R_NOISELESS 1
R_R48 MID N55050 R_NOISELESS 1
R_R5 N709083 MID R_NOISELESS 1
R_R56 N68747 OLN R_NOISELESS 100
R_R57 N68594 OLP R_NOISELESS 100
R_R58 N69264 MID R_NOISELESS 1
R_R59 N69264 SW_OL_OPA810 R_NOISELESS 100
R_R60 MID AOLNET R_NOISELESS 1E6
R_R66 MID CL_CLAMP R_NOISELESS 1E3
R_R8 N10561 N10570 R_NOISELESS 1E3
R_R81 MID N110431 R_NOISELESS 1E9
R_R83 MID N112292 R_NOISELESS 1E9
R_R9 N10570 N11984 R_NOISELESS 1E-3
R_RDUMMY1 MID N516723 R_NOISELESS 10E3
R_RX1 N516723 N725936 R_NOISELESS 100E3
R_R_VCLP N91498 VCLP R_NOISELESS 100
R_R_VIMON VIMON N110431 R_NOISELESS 100
R_R_VOUT_S VOUT_S N112292 R_NOISELESS 100
V_VCM_MAX N30136 VCC_B 0.15
V_VCM_MIN N28602 VEE_B -0.2
V_V_ISCN N48550 MID -120
V_V_ISCP N50645 MID 120
V_V_ORN N55875 VCLP -68.5
V_V_ORP N56119 VCLP 37.13
X_AOL_1 N31014 N11991 MID AOLNET AOL_1_OPA810
X_AOL_2 AOLNET MID MID N79181 AOL_2_OPA810
X_CLAWN MID VIMON VEE_B N38050 CLAWN_OPA810
X_CLAWP VIMON MID N35669 VCC_B CLAWP_OPA810
X_CL_AMP N50645 N48550 VIMON MID N45856 N45986 CLAMP_AMP_LO_OPA810
X_CL_SRC N45892 N45974 CL_CLAMP MID CL_SRC_OPA810
X_ESD_OUT OUT VCC VEE ESD_OUT_OPA810
X_E_N ESDP N06456 VNSE_OPA810
X_H1 N73852 N166377 OLN MID 08_OP_AMP_COMPLETE_H1_OPA810
X_H2 N55050 N166817 OLP MID 08_OP_AMP_COMPLETE_H2_OPA810
X_H3 OUT N516723 N110431 MID 08_OP_AMP_COMPLETE_H3_OPA810
X_IQ_N MID VIMON MID VEE IQ_SRC_OPA810
X_IQ_P VIMON MID VCC MID IQ_SRC_OPA810
X_OL_SENSE MID N69264 N68747 N68594 OL_SENSE_OPA810
X_S1 OUT VCC_CLP N79181 MID 08_OP_AMP_COMPLETE_S1_OPA810
X_S2 VEE_CLP OUT N79181 MID 08_OP_AMP_COMPLETE_S2_OPA810
X_SW_OL SW_OL_OPA810 MID N725398 N725428 SW_OL_OPA810
X_SW_OR CLAMP N166377 N166817 SW_OR_OPA810
X_VCM_CLAMP N25816 MID N30913 MID N30136 N28602 VCM_CLAMP_OPA810
X_VOS_DRIFT N749288 N06456 VOS_DRIFT_OPA810
X_VOS_VS_VCM N10561 N749288 VCC VEE VOS_VS_VCM_OPA810
.ENDS OPA810
*
.SUBCKT 08_OP_AMP_COMPLETE_H1_OPA810 1 2 3 4
H_H1 3 4 VH_H1 1
VH_H1 1 2 0V
.ENDS 08_OP_AMP_COMPLETE_H1_OPA810
*
.SUBCKT 08_OP_AMP_COMPLETE_H2_OPA810 1 2 3 4
H_H2 3 4 VH_H2 -1
VH_H2 1 2 0V
.ENDS 08_OP_AMP_COMPLETE_H2_OPA810
*
.SUBCKT 08_OP_AMP_COMPLETE_H3_OPA810 1 2 3 4
H_H3 3 4 VH_H3 -1E3
VH_H3 1 2 0V
.ENDS 08_OP_AMP_COMPLETE_H3_OPA810
*
.SUBCKT 08_OP_AMP_COMPLETE_S1_OPA810 1 2 3 4
S_S1 3 4 1 2 _S1
RS_S1 1 2 1G
.MODEL _S1 VSWITCH ROFF=200E3 RON=0.5 VOFF=-1 VON=0.4
.ENDS 08_OP_AMP_COMPLETE_S1_OPA810
*
.SUBCKT 08_OP_AMP_COMPLETE_S2_OPA810 1 2 3 4
S_S2 3 4 1 2 _S2
RS_S2 1 2 1G
.MODEL _S2 VSWITCH ROFF=200E3 RON=0.5 VOFF=-1 VON=0.4
.ENDS 08_OP_AMP_COMPLETE_S2_OPA810
*
.SUBCKT AOL_1_OPA810 VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 1E-2
.PARAM IPOS = .5
.PARAM INEG = -.5
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
.ENDS AOL_1_OPA810
*
.SUBCKT AOL_2_OPA810 VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 1E-3
.PARAM IPOS = 5.6
.PARAM INEG = -5.6
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
.ENDS AOL_2_OPA810
*
.SUBCKT CLAMP_AMP_LO_OPA810 VC+ VC- VIN COM VO+ VO-
.PARAM G=1
GVO+ COM VO+ VALUE = {IF(V(VIN,COM)>V(VC+,COM),((V(VIN,COM)-V(VC+,COM))*G),0)}
GVO- COM VO- VALUE = {IF(V(VIN,COM)<V(VC-,COM),((V(VC-,COM)-V(VIN,COM))*G),0)}
.ENDS CLAMP_AMP_LO_OPA810
*
.SUBCKT CLAWN_OPA810 VC+ VC- IOUT+ IOUT-
G1 IOUT+ IOUT- TABLE {(V(VC+,VC-))} =
+(0, 10E-5)
+(30, 10E-5)
+(40, 10E-5)
+(60, 10E-5)
+(70, 10E-5)
+(80, 20E-5)
+(90, 30E-5)
+(100, 40E-5)
+(110, 500E-5)
+(120, 1000E-5)
.ENDS CLAWN_OPA810
*
.SUBCKT CLAWP_OPA810 VC+ VC- IOUT+ IOUT-
G1 IOUT+ IOUT- TABLE {(V(VC+,VC-))} =
+(0, 8E-5)
+(30, 10E-5)
+(40, 28E-5)
+(50, 36E-5)
+(60, 50E-5)
+(70, 100E-5)
+(80, 200E-5)
+(90, 400E-5)
+(100, 800E-5)
+(110, 1600E-5)
+(120, 3200E-5)
.ENDS CLAWP_OPA810
*
.SUBCKT CL_SRC_OPA810 VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 1
.PARAM IPOS = 16.8
.PARAM INEG = -16.8
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
.ENDS CL_SRC_OPA810
*
.SUBCKT ESD_OUT_OPA810 OUT VCC VEE
.MODEL ESD_SW VSWITCH(RON=50 ROFF=1E12 VON=500E-3 VOFF=450E-3)
S1 VCC OUT OUT VCC ESD_SW
S2 OUT VEE VEE OUT ESD_SW
.ENDS ESD_OUT_OPA810
*
.SUBCKT IQ_SRC_OPA810 VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 1E-3
G1 IOUT+ IOUT- VALUE={IF( (V(VC+,VC-)<=0),0,GAIN*V(VC+,VC-) )}
.ENDS IQ_SRC_OPA810
*
.SUBCKT OL_SENSE_OPA810 1 2 3 4
GSW+ 1 2 VALUE = {IF((V(3,1)>10E-3 | V(4,1)>10E-3),1,0)}
.ENDS OL_SENSE_OPA810
*
.SUBCKT SW_OL_OPA810 SW_OL_OPA810 MID CAP_L CAP_R
.MODEL OL_SW VSWITCH(RON=1E-3 ROFF=1E9 VON=900E-3 VOFF=800E-3)
S1 CAP_L CAP_R SW_OL_OPA810 MID OL_SW
.ENDS SW_OL_OPA810
*
.SUBCKT SW_OR_OPA810 CLAMP OLN OLP
.MODEL OR_SW VSWITCH(RON=10E-3 ROFF=1E9 VON=10E-3 VOFF=0)
S1 OLP CLAMP CLAMP OLP OR_SW
S2 CLAMP OLN OLN CLAMP OR_SW
.ENDS SW_OR_OPA810
*
.SUBCKT VCM_CLAMP_OPA810 VIN+ VIN- IOUT- IOUT+ VP+ VP-
.PARAM GAIN = 1
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VIN+,VIN-),V(VP-,VIN-), V(VP+,VIN-))}
.ENDS VCM_CLAMP_OPA810
*
.SUBCKT VNSE_OPA810 1 2
.PARAM FLW=0.1
.PARAM NLF=1190
.PARAM NVR=5.7
.PARAM GLF={PWR(FLW,0.25)*NLF/1164}
.PARAM RNV={1.184*PWR(NVR,2)}
.MODEL DVN D KF={PWR(FLW,0.5)/1E11} IS=1.0E-16
I1 0 7 10E-3
I2 0 8 10E-3
D1 7 0 DVN
D2 8 0 DVN
E1 3 6 7 8 {GLF}
R1 3 0 1E9
R2 3 0 1E9
R3 3 6 1E9
E2 6 4 5 0 10
R4 5 0 {RNV}
R5 5 0 {RNV}
R6 3 4 1E9
R7 4 0 1E9
E3 1 2 3 4 1
.ENDS VNSE_OPA810
*
.SUBCKT VOS_DRIFT_OPA810 VOS+ VOS-
.PARAM DC = 76.1E-6
.PARAM POL = 1
.PARAM DRIFT = 0.3E-6
E1 VOS+ VOS- VALUE={DC+POL*DRIFT*(TEMP-27)}
.ENDS VOS_DRIFT_OPA810
*
.SUBCKT VOS_VS_VCM_OPA810 V+ V- REF+ REF-
E1 V+ 1 TABLE {(V(REF+, V-))} =
+(0.35, 450E-6)
+(0.4, 435E-6)
+(0.55, 275E-6)
+(0.65, 150E-6)
+(0.75, 75E-6)
+(0.85, 25E-6)
+(1, 0)
V1 1 V- 0
.ENDS VOS_VS_VCM_OPA810
*

View File

@ -0,0 +1,154 @@
@OrCAD Simulation Server Version: 1.0
@Settings: 0 1
@General:
ProfileName= "ac_sweep"
ProfileFile= "ac_sweep.sim"
Connectivity= "SCHEMATIC1.net"
NetlistFile= "ac_sweep.cir"
DataFile= "AC_Sweep.dat"
OutFile= "AC_Sweep.out"
Notes=
@#$BEGINNOTES
@#$ENDNOTES
@End General
@Analysis: 0 1
+0 0 0 0
+0 "1000ns"
+1 ""
+2 "0"
+3 "1n"
+4 ""
+5 ""
+6 ""
@End Analysis
@Analysis: 1 0
+2 0 0
+0 "31"
+1 "1k"
+2 "1G"
+3 ""
+4 ""
+5 ""
@End Analysis
@Analysis: 2 0
+0 0
+0 ""
+1 ""
+2 ""
+3 ""
+4 ""
+5 ""
+6 ""
+7 ""
@End Analysis
@Analysis: 3 0
+0 0 0
+0 ""
+1 ""
+2 ""
@End Analysis
@Analysis: 4 0
+0 0 1 0 0 0 0 0 0 0 1
+0 ""
+1 ""
+2 ""
+3 ""
+4 ""
+5 ""
+6 ""
+7 ""
LoadFile 0 ""
SaveFile 0 ""
@End Analysis
@Analysis: 5 0
+0 0
+0 ""
+1 ""
+2 ""
+3 ""
+4 ""
+5 ""
+6 ""
+7 ""
@End Analysis
@Analysis: 6 0
+1
+0 ""
@End Analysis
@Analysis: 7 0
+0 0
+0 ""
+1 ""
+2 ""
+3 ""
+4 ""
+5 ""
@End Analysis
@Analysis: 8 0
+0
+0 ""
+1 ""
+2 ""
+3 ""
+4 ""
+5 ""
@End Analysis
@Analysis: 9 0
+0 ""
@End Analysis
@Analysis: 10 0
+0 0
+0 ""
+1 ""
+2 ""
+3 ""
+4 ""
+5 ""
+6 ""
+7 ""
@End Analysis
@Analysis: 11 1
+ 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0
+ 0 0 0 0 0 0 0 0 0
@End Analysis
@Analysis: 12 0
+2236960 0 1
@End Analysis
@Analysis: 13 1
+0 1 1 1
@End Analysis
@Analysis: 14 1
+1 1 1 "*"
@End Analysis
@Analysis: 15 0
@End Analysis
@Analysis: 16 0
+0 "0"
+1 "0"
+2 "chkpt_default, , ,"
@End Analysis
@Analysis: 17 0
+0 "-1"
+1 "-1"
+2 "0"
+3 "-1"
+4 "1"
@End Analysis
@Analysis: 18 0
+0 ""
+1 "0.1"
+2 "0.1"
+3 "1"
+4 "2"
+5 ""
+6 "false"
+7 "5"
@End Analysis
@Analysis: 19 0
+0 "0"
+1 "1"
+2 "1"
+3 "10"
+4 "1"
@End Analysis

View File

@ -0,0 +1,22 @@
** Profile: "SCHEMATIC1-ac_sweep" [ C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_pspice-pspicefiles\schematic1\ac_sweep.sim ]
** Creating circuit file "ac_sweep.cir"
** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS
*Libraries:
* Profile Libraries :
* Local Libraries :
.LIB "../../../opa810_a.lib"
* From [PSPICE NETLIST] section of C:\SPB_Data\cdssetup\OrCAD_PSpiceTIPSpice_Install\17.4.0\PSpice.ini file:
.lib "nom_pspti.lib"
.lib "nom.lib"
*Analysis directives:
.TRAN 0 1000ns 0 1n
.OPTIONS ADVCONV
.PROBE64 N([OUT])
.PROBE64 N([IN+])
.INC "..\SCHEMATIC1.net"
.END

File diff suppressed because one or more lines are too long

View File

@ -0,0 +1,21 @@
lib=C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_a.lib, offset=1293, size=7389
lib=C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_a.lib, offset=9493, size=179
lib=C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_a.lib, offset=9673, size=181
lib=C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_a.lib, offset=10111, size=249
lib=C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_a.lib, offset=10361, size=267
lib=C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_a.lib, offset=9855, size=255
lib=C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_a.lib, offset=10629, size=182
lib=C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_a.lib, offset=10812, size=179
lib=C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_a.lib, offset=11798, size=399
lib=C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_a.lib, offset=8683, size=135
lib=C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_a.lib, offset=8819, size=136
lib=C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_a.lib, offset=8956, size=138
lib=C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_a.lib, offset=10992, size=151
lib=C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_a.lib, offset=11144, size=121
lib=C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_a.lib, offset=9095, size=198
lib=C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_a.lib, offset=9294, size=198
lib=C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_a.lib, offset=11266, size=177
lib=C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_a.lib, offset=11444, size=178
lib=C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_a.lib, offset=11623, size=174
lib=C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_a.lib, offset=12198, size=168
lib=C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_a.lib, offset=12367, size=223

View File

@ -0,0 +1,183 @@
**** 02/25/21 11:56:25 ******* PSpice 17.4.0 (Nov 2018) ******* ID# 0 ********
** Profile: "SCHEMATIC1-ac_sweep" [ C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_pspice-pspicefile
**** CIRCUIT DESCRIPTION
******************************************************************************
** Creating circuit file "ac_sweep.cir"
** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS
*Libraries:
* Profile Libraries :
* Local Libraries :
.LIB "../../../opa810_a.lib"
* From [PSPICE NETLIST] section of C:\SPB_Data\cdssetup\OrCAD_PSpiceTIPSpice_Install\17.4.0\PSpice.ini file:
.lib "nom_pspti.lib"
.lib "nom.lib"
*Analysis directives:
.TRAN 0 1000ns 0 1n
.OPTIONS ADVCONV
.PROBE64 V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*))
.INC "..\SCHEMATIC1.net"
**** INCLUDING SCHEMATIC1.net ****
* source OPA810_PSPICE
R_R2 0 N01830 100 TC=0,0
V_V2 VEE 0 -12Vdc
R_R1 N01830 OUT 900 TC=0,0
V_V1 VCC 0 12Vdc
X_U1 IN+ N01830 OUT VCC VEE OPA810
V_V3 IN+ 0 AC 1
+SIN 0 1 1e6 0 0 0
**** RESUMING ac_sweep.cir ****
.END
**** 02/25/21 11:56:25 ******* PSpice 17.4.0 (Nov 2018) ******* ID# 0 ********
** Profile: "SCHEMATIC1-ac_sweep" [ C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_pspice-pspicefile
**** Diode MODEL PARAMETERS
******************************************************************************
X_U1.X_E_N.DVN
IS 100.000000E-18
KF 3.162278E-12
**** 02/25/21 11:56:25 ******* PSpice 17.4.0 (Nov 2018) ******* ID# 0 ********
** Profile: "SCHEMATIC1-ac_sweep" [ C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_pspice-pspicefile
**** Resistor MODEL PARAMETERS
******************************************************************************
X_U1.R_NOISE X_U1.R_NOISELESS
T_Measured 27 27
T_Current 0 -273.15
R 1 1
**** 02/25/21 11:56:25 ******* PSpice 17.4.0 (Nov 2018) ******* ID# 0 ********
** Profile: "SCHEMATIC1-ac_sweep" [ C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_pspice-pspicefile
**** Voltage Controlled Switch MODEL PARAMETERS
******************************************************************************
X_U1.X_ESD_OUT.ESD_SW X_U1.X_S1._S1 X_U1.X_S2._S2
RON 50 .5 .5
ROFF 1.000000E+12 200.000000E+03 200.000000E+03
VON .5 .4 .4
VOFF .45 -1 -1
X_U1.X_SW_OL.OL_SW
RON 1.000000E-03
ROFF 1.000000E+09
VON .9
VOFF .8
X_U1.X_SW_OR.OR_SW
RON .01
ROFF 1.000000E+09
VON .01
VOFF 0
ERROR(ORPSIM-16583): Detected an imported model containing transistors or diodes. For such models, PSpice for TI supports a minimum of one and maximum of three traces. Reduce the number of traces and simulate again.
ABORTING SIMULATION
**** 02/25/21 11:56:25 ******* PSpice 17.4.0 (Nov 2018) ******* ID# 0 ********
** Profile: "SCHEMATIC1-ac_sweep" [ C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript\opa810_pspice\opa810_pspice-pspicefile
**** JOB STATISTICS SUMMARY
******************************************************************************
Node counts:
Top level (NUNODS) = 6
External (NCNODS) = 91
Total (NUMNOD) = 91
Total device count (NUMEL) = 190
Capacitors (C) = 29
Diodes (D) = 2
VCVS (E) = 8
VCCS (G) = 34
CCVS (H) = 3
Current Sources (I) = 5
Resistors (R) = 89
VSwitches (S) = 7
Voltage Sources (V) = 13
Number of subcircuits (X) = 22
Matrix statistics:
Matrix size (NSTOP) = 115
Initial no. elements (NTTAR) = 458
No. elements w/ fillin (NTTBR) = 458
No. fillins (IFILL) = 0
No. overflows (NTTOV) = 0
No. LU operations (IOPS) = 0
Percent sparsity (PERSPA) = 96.537
Analysis statistics:
No. total time points (NUMTTP) = 0
No. rejected time points (NUMRTP) = 0
No. iterations (NUMNIT) = 0
Load Threads = 1
Runtime statistics: Seconds Iterations
Matrix load = 0.00
Matrix solution = 0.00 1
Readin = 2.16
General setup = 0.00
CMI setup = 0.00
Setup = 0.00
DC sweep = 0.00 0
Bias point = 0.00 0
AC and noise = 0.00 0
Total transient analysis = 0.00
Output = 0.00
Overhead = .33
License check-out time = 13.42
Total job time (using Solver 1) = 2.16

View File

@ -0,0 +1,77 @@
[DISPLAYS]
BEGIN DISPLAY LAST SESSION
ANALYSIS TRANSIENT_ANALYSIS
SYMBOL ALWAYS
TRACECOLORSCHEME NORMAL
BEGIN ANAPLOT 1
ACTIVE
XBASE
BEGIN XAXIS
XAXISUSERNAME 0 (null)
TEXT Time
RANGEFLAG AUTO
TYPE LINEAR
UNIT s
BEGIN GRIDS
AUTOMATIC
MAJORNUMBERS
MAJORSTYLE LINES
MAJORPATTERN SOLID
MINORSTYLE LINES
MINORPATTERN DOT
END GRIDS
END XAXIS
BEGIN YAXIS 1
YAXISSIDE LEFT
ACTIVE
RANGEFLAG AUTO
TYPE LINEAR
UNIT V
BEGIN GRIDS
AUTOMATIC
MAJORNUMBERS
MAJORSTYLE LINES
MAJORPATTERN SOLID
MINORSTYLE LINES
MINORPATTERN DOT
END GRIDS
BEGIN TRACE V(IN+)
MARKERID 8
END TRACE V(IN+)
BEGIN TRACE V(OUT)
MARKERID 9
END TRACE V(OUT)
END YAXIS 1
END ANAPLOT 1
END DISPLAY LAST SESSION
BEGIN DISPLAY LAST DISPLAY
ANALYSIS TRANSIENT_ANALYSIS
SYMBOL ALWAYS
TRACECOLORSCHEME NORMAL
BEGIN ANAPLOT 1
ACTIVE
XBASE
BEGIN XAXIS
XAXISUSERNAME 0 (null)
TEXT Time
RANGEFLAG AUTO
TYPE LINEAR
UNIT s
BEGIN GRIDS
AUTOMATIC
MAJORNUMBERS
MAJORSTYLE LINES
MAJORPATTERN SOLID
MINORSTYLE LINES
MINORPATTERN DOT
END GRIDS
END XAXIS
BEGIN YAXIS 1
YAXISSIDE LEFT
ACTIVE
RANGEFLAG NORANGE
TYPE LINEAR
UNIT
END YAXIS 1
END ANAPLOT 1
END DISPLAY LAST DISPLAY

View File

@ -0,0 +1 @@
{"INSTALL_INFO":{"SOFTLANDING":"TRUE"}}

Binary file not shown.

View File

@ -0,0 +1,82 @@
(ExpressProject "OPA810_PSPICE"
(ProjectVersion "19981106")
(SoftwareVersion "17.4-2020 S004-[02/25/21]")
(ProjectType "Analog or A/D Mixed Mode")
(Folder "Design Resources"
(Folder "Library"
(File ".\library\opa810.olb"
(Type "Schematic Library")))
(NoModify)
(File ".\opa810_pspice.dsn"
(Type "Schematic Design"))
(BuildFileAddedOrDeleted "x")
(CompileFileAddedOrDeleted "x")
(DOCKED "TRUE")
(DOCKING_POSITION "61215")
(PSPICE_Regenerate_Netlist_Flag "FALSE"))
(Folder "Layout")
(Folder "Outputs"
(File ".\opa810_pspice-pspicefiles\schematic1\schematic1.net"
(Type "Report")))
(Folder "PSpice Resources"
(Folder "Simulation Profiles"
(ActiveProfile ".\opa810_pspice-pspicefiles\schematic1\ac_sweep.sim")
(File.PSpice.{09528990-3187-11D2-BC7B-00A0C90CBF91}
".\opa810_pspice-pspicefiles\schematic1\ac_sweep.sim"
(DisplayName "SCHEMATIC1-AC_Sweep")
(Type "PSpice Profile")))
(Folder "Model Libraries"
(Sort User)
(File ".\opa810_a.lib"
(Type "PSpiceLibrary")
(DisplayName ".\opa810_a.lib")))
(Folder "Stimulus Files"
(Sort User))
(Folder "Include Files"
(Sort User)))
(DefaultLibraryBrowseDirectory "library\PSpice")
(PartMRUSelector
(VSIN
(FullPartName "VSIN.Normal")
(LibraryName
"C:\CADENCE\PSPICETI\TOOLS\CAPTURE\LIBRARY\PSPICE\SOURCE.OLB")
(DeviceIndex "0"))
(VDC
(FullPartName "VDC.Normal")
(LibraryName
"C:\CADENCE\PSPICETI\TOOLS\CAPTURE\LIBRARY\PSPICE\SOURCE.OLB")
(DeviceIndex "0"))
(OPA810
(FullPartName "OPA810.Normal")
(LibraryName
"C:\USERS\A0232073\DESKTOP\GWL_MODELS\OPA810\APPENDSCRIPT\OPA810_A.OLB")
(DeviceIndex "0")))
(LastUsedLibraryBrowseDirectory
"C:\Users\a0232073\Desktop\GWL_Models\OPA810\AppendScript")
(GlobalState
(FileView
(Path "Design Resources")
(Path "Design Resources" ".\opa810_pspice.dsn")
(Path "Design Resources" ".\opa810_pspice.dsn" "SCHEMATIC1")
(Path "Design Resources" "Library")
(Path "Outputs")
(Select "Design Resources" ".\opa810_pspice.dsn"))
(HierarchyView)
(Doc
(Type "COrCapturePMDoc")
(Frame
(Placement "44 0 1 -1 -1 -8 -31 0 200 0 875"))
(Tab 0))
(Doc
(Type "COrSchematicDoc")
(Frame
(Placement "44 0 1 -1 -1 -1 -1 5 1468 24 893")
(Scroll "-162 -8")
(Zoom "114")
(Occurrence "/"))
(Path
"C:\USERS\A0232073\DESKTOP\GWL_MODELS\OPA810\APPENDSCRIPT\OPA810_PSPICE\OPA810_PSPICE.DSN")
(Schematic "SCHEMATIC1")
(Page "PAGE1")))
(MPSSessionName "a0232073")
(Folder "Logs"))