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misc local modifications

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Brendan Haines
2022-04-08 21:49:19 -06:00
parent 4054b0ec1d
commit da60c3d99e
6720 changed files with 396774 additions and 1615 deletions
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264
spice/test/AD8038.sub Executable file
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*AD8038 Macro-model
*Function:Amplifier
*
*Revision History:
*Rev.2.1 Jun 2015-ZZ
*Copyright 2015 by Analog Devices
*
*Refer to http://www.analog.com/Analog_Root/static/techSupport/designTools/spicemodels/license
*for License Statement. Use of this model indicates your acceptance
*of the terms and provisions in the License Staement.
*
*Tested on MultSIm, SiMetrix(NGSpice), PSpice
*
*Not modeled: Distortion, PSRR, Overload Recovery,
* Shutdown Turn On/Turn Off time
*
*Parameters modeled include:
* Vos, Ibias, Input CM limits and Typ output voltge swing over full supply range,
* Open Loop Gain & Phase, Slew Rate, Output current limits, Voltage & Current Noise over temp,
* Capacitive load drive, Quiescent and dynamic supply currents,
* Shut Down pin functionality where applicable,
* Single supply & offset supply functionality.
*
*Node Assignments
* Non-Inverting Input
* | Inverting Input
* | | Positive supply
* | | | Negative supply
* | | | | Output
* | | | | | PD
* | | | | | |
.Subckt AD8038 100 101 102 103 104 106
*
***Power Supplies***
Rz1 102 1020 Rideal 1e-6
Rz2 103 1030 Rideal 1e-6
Ibias 1020 1030 dc 0.2e-3
DzPS 98 1020 diode
Iquies 1020 98 dc 0.8e-3
S1 98 1030 106 113 Switch
R1 1020 99 Rideal 1e7
R2 99 1030 Rideal 1e7
e1 111 110 1020 110 1
e2 110 112 110 1030 1
e3 110 0 99 0 1
*
*
***Inputs***
S2 1 100 106 113 Switch
S3 9 101 106 113 Switch
VOS 1 2 dc 500e-6
IbiasP 110 2 dc 0.4e-6
IbiasN 110 9 dc 0.4e-6
RinCMP 110 2 Rideal 20e6
RinCMN 9 110 Rideal 20e6
CinCMP 110 2 1e-12
CinCMN 9 110 1e-12
IOS 9 2 0.025e-6
RinDiff 9 2 Rideal 2e3
CinDiff 9 2 0.1e-12
*
*
***Non-Inverting Input with Clamp***
g1 3 110 110 2 0.001
RInP 3 110 Rideal 1e3
RX1 40 3 Rideal 0.001
DInP 40 41 diode
DInN 42 40 diode
VinP 111 41 dc 1.46
VinN 42 112 dc 1.46
*
*
***Vnoise***
hVn 6 5 Vmeas1 707.10678
Vmeas1 20 110 DC 0
Vvn 21 110 dc 0.65
Dvn 21 20 DVnoisy
hVn1 6 7 Vmeas2 707.10678
Vmeas2 22 110 dc 0
Vvn1 23 110 dc 0.65
Dvn1 23 22 DVnoisy
*
*
***Inoise***
FnIN 9 110 Vmeas3 0.7071068
Vmeas3 51 110 dc 0
VnIN 50 110 dc 0.65
DnIN 50 51 DINnoisy
FnIN1 110 9 Vmeas4 0.7071068
Vmeas4 53 110 dc 0
VnIN1 52 110 dc 0.65
DnIN1 52 53 DINnoisy
*
FnIP 2 110 Vmeas5 0.7071068
Vmeas5 31 110 dc 0
VnIP 30 110 dc 0.65
DnIP 30 31 DIPnoisy
FnIP1 110 2 Vmeas6 0.7071068
Vmeas6 33 110 dc 0
VnIP1 32 110 dc 0.65
DnIP1 32 33 DIPnoisy
*
*
***CMRR***
RcmrrP 3 10 Rideal 1e12
RcmrrN 10 9 Rideal 1e12
g10 11 110 10 110 -1e-10
Lcmrr 11 12 1e-12
Rcmrr 12 110 Rideal 1e3
e4 5 3 11 110 1
*
*
***Power Down***
VPD 111 80 dc 4.5
VPD1 81 0 dc 2
RPD 111 106 Rideal 1e6
ePD 80 113 82 0 1
RDP1 82 0 Rideal 1e3
CPD 82 0 1e-10
S5 81 82 83 113 Switch
CDP1 83 0 1e-12
RPD2 106 83 1e6
*
*
***Feedback Pin***
*RF 105 104 Rideal 0.001
*
*
***VFB Stage***
g200 200 110 7 9 1
R200 200 110 Rideal 250
DzSlewP 201 200 DzSlewP
DzSlewN 201 110 DzSlewN
*
*
***Dominant Pole at 48 Hz***
g210 210 110 200 110 3.8149e-6
R210 210 110 Rideal 3.32e6
C210 210 110 1e-012
*
*
***Output Voltage Clamp-1***
RX2 60 210 Rideal 0.001
DzVoutP 61 60 DzVoutP
DzVoutN 60 62 DzVoutN
DVoutP 61 63 diode
DVoutN 64 62 diode
VoutP 65 63 dc 5.839
VoutN 64 66 dc 5.839
e60 65 110 111 110 1.05
e61 66 110 112 110 1.05
*
*
***Pole at 800MHz***
g220 220 110 210 110 0.001
R220 220 110 Rideal 1000
C220 220 110 0.1989e-12
*
***Pole at 900MHz***
g230 230 110 220 110 0.001
R230 230 110 Rideal 1000
C230 230 110 0.1768e-12
*
***Pole at 1200MHz***
g240 240 110 230 110 0.001
R240 240 110 Rideal 1000
C240 240 110 0.1326e-12
*
***Zero at 1800MHz***
g245 245 110 240 110 0.001
R245 245 246 Rideal 1000
L245 246 110 0.0884e-6
*
***Buffer***
g250 250 110 245 110 0.001
R250 250 110 Rideal 1000
*
***Buffer***
g255 255 110 250 110 0.001
R255 255 110 Rideal 1000
*
***Buffer***
g260 260 110 255 110 0.001
R260 260 110 Rideal 1000
*
***Buffer***
g265 265 110 260 110 0.001
R265 265 110 Rideal 1000
*
***Buffer***
g270 270 110 265 110 0.001
R270 270 110 Rideal 1000
*
***Buffer***
e280 280 110 270 110 1
R280 280 285 Rideal 10
*
***Peak: f=160MHz, Zeta=0.7, Gain=1.2dB***
e290 290 110 285 110 1
R290 290 292 Rideal 10
L290 290 291 7.105e-9
C290 291 292 139.26e-12
R291 292 110 Rideal 67.498
e295 295 110 292 110 1.1482
*
*
***Output Stage***
g300 300 110 295 110 0.001
R300 300 110 Rideal 1000
e301 301 110 300 110 1
Rout 302 303 Rideal 33
Lout 303 310 4.6e-9
Cout 310 110 1e-12
*
*
***Output Current Limit***
H1 301 304 Vsense1 100
Vsense1 301 302 dc 0
VIoutP 305 304 dc 15.336
VIoutN 304 306 dc 19.336
DIoutP 307 305 diode
DIoutN 306 307 diode
Rx3 307 300 Rideal 0.001
*
*
***Output Clamp-2***
VoutP1 111 73 dc 1.685
VoutN1 74 112 dc 1.685
DVoutP1 75 73 diode
DVoutN1 74 75 diode
RX4 75 310 Rideal 0.001
*
*
***Supply Currents***
FIoVcc 314 110 Vmeas8 1
Vmeas8 310 311 dc 0
R314 110 314 Rideal 1e9
DzOVcc 110 314 diode
DOVcc 102 314 diode
RX5 311 312 Rideal 0.001
FIoVee 315 110 Vmeas9 1
Vmeas9 312 313 dc 0
R315 315 110 Rideal 1e9
DzOVee 315 110 diode
DOVee 315 103 diode
*
*
***Output Switch***
S4 104 313 106 113 Switch
*
*
*** Common Models ***
.model diode d(bv=100)
.model Switch vswitch(Von=2.005,Voff=1.995,ron=0.001,roff=1e6)
.model DzVoutP D(BV=4.3)
.model DzVoutN D(BV=4.3)
.model DzSlewP D(BV=111.881)
.model DzSlewN D(BV=111.881)
.model DVnoisy D(IS=2.29e-15 KF=2.13e-15)
.model DINnoisy D(IS=1.03e-17 KF=1.07e-14)
.model DIPnoisy D(IS=1.03e-17 KF=1.07e-14)
.model Rideal res(T_ABS=-273)
*
.ends

265
spice/test/ADA4891.sub Executable file
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*ADA4891 Macro-model
*Function:Amplifier
*
*Revision History:
*Rev.2.1 Oct 2016-JL
*Copyright 2016 by Analog Devices
*
*Refer to http://www.analog.com/Analog_Root/static/techSupport/designTools/spicemodels/license
*for License Statement. Use of this model indicates your acceptance
*of the terms and provisions in the License Staement.
*
*Tested on MultSIm, SiMetrix(NGSpice), PSpice
*
*Not modeled: Distortion, PSRR, Overload Recovery,
* Shutdown Turn On/Turn Off time
*
*Parameters modeled include:
* Vos, Ibias, Input CM limits and Typ output voltge swing over full supply range,
* Open Loop Gain & Phase, Slew Rate, Output current limits, Voltage & Current Noise over temp,
* Capacitive load drive, Quiescent and dynamic supply currents.
*
*
*
*Node Assignments
* Non-Inverting Input
* | Inverting Input
* | | Positive supply
* | | | Negative supply
* | | | | Output
* | | | | |
* | | | | |
.Subckt ADA4891 100 101 102 103 104
*
***Power Supplies***
Rz1 102 1020 Rideal 1e-6
Rz2 103 1030 Rideal 1e-6
Ibias 1020 1030 dc 0.01e-3
DzPS 98 1020 diode
Iquies 1020 98 dc 4.39e-3
S1 98 1030 106 113 Switch
R1 1020 99 Rideal 1e7
R2 99 1030 Rideal 1e7
e1 111 110 1020 110 1
e2 110 112 110 1030 1
e3 110 0 99 0 1
*
*
***Inputs***
S2 1 100 106 113 Switch
S3 9 101 106 113 Switch
VOS 1 2 dc 2.5e-3
IbiasP 110 2 dc 2e-12
IbiasN 110 9 dc 2e-12
RinCMP 110 2 Rideal 5000e6
RinCMN 9 110 Rideal 5000e6
CinCMP 110 2 2.2e-12
CinCMN 9 110 2.2e-12
IOS 9 2 1e-15
RinDiff 9 2 Rideal 10000e3
CinDiff 9 2 0.8e-12
*
*
***Non-Inverting Input with Clamp***
g1 3 110 110 2 0.001
RInP 3 110 Rideal 1e3
RX1 40 3 Rideal 0.001
DInP 40 41 diode
DInN 42 40 diode
VinP 111 41 dc 1.26
VinN 42 112 dc 0.16
*
*
***Vnoise***
hVn 6 5 Vmeas1 707.10678
Vmeas1 20 110 DC 0
Vvn 21 110 dc 0.65
Dvn 21 20 DVnoisy
hVn1 6 7 Vmeas2 707.10678
Vmeas2 22 110 dc 0
Vvn1 23 110 dc 0.65
Dvn1 23 22 DVnoisy
*
*
***Inoise***
FnIN 9 110 Vmeas3 0.7071068
Vmeas3 51 110 dc 0
VnIN 50 110 dc 0.65
DnIN 50 51 DINnoisy
FnIN1 110 9 Vmeas4 0.7071068
Vmeas4 53 110 dc 0
VnIN1 52 110 dc 0.65
DnIN1 52 53 DINnoisy
*
FnIP 2 110 Vmeas5 0.7071068
Vmeas5 31 110 dc 0
VnIP 30 110 dc 0.65
DnIP 30 31 DIPnoisy
FnIP1 110 2 Vmeas6 0.7071068
Vmeas6 33 110 dc 0
VnIP1 32 110 dc 0.65
DnIP1 32 33 DIPnoisy
*
*
***CMRR***
RcmrrP 3 10 Rideal 1e12
RcmrrN 10 9 Rideal 1e12
g10 11 110 10 110 -8.437e-9
Lcmrr 11 12 8e-3
Rcmrr 12 110 Rideal 1e3
e4 5 3 11 110 1
*
*
***Power Down***
VPD 111 80 dc 2
VPD1 81 0 dc 1.5
RPD 111 106 Rideal 1e6
ePD 80 113 82 0 1
RDP1 82 0 Rideal 1e3
CPD 82 0 1e-10
S5 81 82 83 113 Switch
CDP1 83 0 1e-12
RPD2 106 83 1e6
*
*
***Feedback Pin***
*RF 105 104 Rideal 0.001
*
*
***VFB Stage***
g200 200 110 7 9 1
R200 200 110 Rideal 250
DzSlewP 201 200 DzSlewP
DzSlewN 201 110 DzSlewN
*
*
***Dominant Pole at 8.88 Hz***
g210 210 110 200 110 3.378e-6
R210 210 110 Rideal 17.92e6
C210 210 110 1e-012
*
*
***Output Voltage Clamp-1***
RX2 60 210 Rideal 0.001
DzVoutP 61 60 DzVoutP
DzVoutN 60 62 DzVoutN
DVoutP 61 63 diode
DVoutN 64 62 diode
VoutP 65 63 dc 5.121
VoutN 64 66 dc 5.095
e60 65 110 111 110 1.27
e61 66 110 112 110 1.27
*
*
***Pole at 500MHz***
g220 220 110 210 110 0.001
R220 220 110 Rideal 1000
C220 220 110 0.3183e-12
*
***Pole at 800MHz***
g230 230 110 220 110 0.001
R230 230 110 Rideal 1000
C230 230 110 0.1989e-12
*
***Pole at 1200MHz***
g240 240 110 230 110 0.001
R240 240 110 Rideal 1000
C240 240 110 0.1326e-12
*
***Pole at 1500MHz***
g245 245 110 240 110 0.001
R245 245 110 Rideal 1000
C245 245 110 0.1061e-12
*
***Pole at 1700MHz***
g250 250 110 245 110 0.001
R250 250 110 Rideal 1000
C250 250 110 0.0936e-12
*
***Buffer***
g255 255 110 250 110 0.001
R255 255 110 Rideal 1000
*
***Buffer***
g260 260 110 255 110 0.001
R260 260 110 Rideal 1000
*
***Buffer***
g265 265 110 260 110 0.001
R265 265 110 Rideal 1000
*
***Buffer***
g270 270 110 265 110 0.001
R270 270 110 Rideal 1000
*
***Buffer***
e280 280 110 270 110 1
R280 280 285 Rideal 10
*
***Peak: f=210MHz, Zeta=0.7, Gain=0.2dB***
e290 290 110 285 110 1
R290 290 292 Rideal 10
L290 290 291 5.413e-9
C290 291 292 106.103e-12
R291 292 110 Rideal 429.314
e295 295 110 292 110 1.0233
*
*
***Output Stage***
g300 300 110 295 110 0.001
R300 300 110 Rideal 1000
e301 301 110 300 110 1
Rout 302 303 Rideal 36
Lout 303 310 7e-9
Cout 310 110 1.3e-12
*
*
***Output Current Limit***
H1 301 304 Vsense1 100
Vsense1 301 302 dc 0
VIoutP 305 304 dc 19.836
VIoutN 304 306 dc 30.036
DIoutP 307 305 diode
DIoutN 306 307 diode
Rx3 307 300 Rideal 0.001
*
*
***Output Clamp-2***
VoutP1 111 73 dc 0.705
VoutN1 74 112 dc 0.695
DVoutP1 75 73 diode
DVoutN1 74 75 diode
RX4 75 310 Rideal 0.001
*
*
***Supply Currents***
FIoVcc 314 110 Vmeas8 1
Vmeas8 310 311 dc 0
R314 110 314 Rideal 1e9
DzOVcc 110 314 diode
DOVcc 102 314 diode
RX5 311 312 Rideal 0.001
FIoVee 315 110 Vmeas9 1
Vmeas9 312 313 dc 0
R315 315 110 Rideal 1e9
DzOVee 315 110 diode
DOVee 315 103 diode
*
*
***Output Switch***
S4 104 313 106 113 Switch
*
*
*** Common Models ***
.model diode d(bv=100)
.model Switch vswitch(Von=1.505,Voff=1.495,ron=0.001,roff=1e6)
.model DzVoutP D(BV=4.3)
.model DzVoutN D(BV=4.3)
.model DzSlewP D(BV=50.802)
.model DzSlewN D(BV=62.643)
.model DVnoisy D(IS=2.99e-15 KF=1.02e-14)
.model DINnoisy D(IS=3.81e-19 KF=0.00e0)
.model DIPnoisy D(IS=3.81e-19 KF=0.00e0)
.model Rideal res(T_ABS=-273)
*
.ends ADA4891

449
spice/test/LMH5401.lib Executable file
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* LMH5401
*****************************************************************************
* (C) Copyright 2012 Texas Instruments Incorporated. All rights reserved.
*****************************************************************************
** This model is designed as an aid for customers of Texas Instruments.
** TI and its licensors and suppliers make no warranties, either expressed
** or implied, with respect to this model, including the warranties of
** merchantability or fitness for a particular purpose. The model is
** provided solely on an "as is" basis. The entire risk as to its quality
** and performance is with the customer.
*****************************************************************************
*
** Released by: WEBENCH(R) Design Center, Texas Instruments Inc.
* Part: LMH5401
* Date: 10/20/2013
* Model Type: All In One
* Simulator: TINA9
* Simulator Version: 9.3.50.40
* EVM Order Number: N/A
* EVM Users Guide: N/A
* Datasheet: SBOS710 - October 2014
*
* Model Version: 1.2
*
*****************************************************************************
*
* Updates:
*
* Version 1.0 : Release to Web
* Version 1.1 : Add internal input resistance
* Version 1.2 : Rev CM output connections. Add current noise
*
*****************************************************************************
* Notes:
* The model meets the following specs for 5V operation, G = 4V/V:
* 1. Turn-on and turn-off time delay
* 2. Slew Rate
* 3. CMRR vs frequency
* 4. Input and output common-mode range
* 5. Input voltage noise
* 6. Output voltage swing and output current
* 7. Quiescent current for active and power-down modes
* 8. Output common-mode bandwidth, gain and offset
* 9. HD2, HD3 vs frequency
* 10 HD2, HD3 vs. VICM and VOCM
* Note:
* The model HD2 & HD3 are 4dB-8dB better than the actual device for f < 50MHz
* The model may not conform to published specs for 3.3V operation
*****************************************************************************
*
*$
.SUBCKT LMH5401 OUTP OUTN FBP FBN INP INN CM PD VCC VEE GND
X_U17 U3_OUTP U3_OUTN LIMITER_INP LIMITER_INN VMID VCC VEE IOUTP IOUTN
+ LIMITER
G_G2 VMID VEE IOUTN VMID 1
R_R20 OUTPINT OUTP 10
E_E8 OUT 0 OUTPINT OUTNINT 1
X_U30 GBW_INP LIM_INP VCC VEE VMID IN_LIM
G_G10 DIST_OUTN DIST_OUTP N1047668 N1047660 0.13
X_S2 SHDN VMID N17901 N15575 DEV_SCH_S2
E_E6 N15575 CM_OUT U2_OUTP U2_OUTN 1
G_G11 DIST_OUTN DIST_OUTP N1056358 N1055868 0.1
X_U16 U2_OUTP U2_OUTN LIMITER_INP LIMITER_INN VMID VCC VEE IOUTP IOUTN
+ LIMITER
X_U25 CM_OUT VMID N65800 CMCALC SHDN VMID CM_CL_GAIN
X_H1 N17901 OUTPINT IOUTP VMID DEV_SCH_H1
X_U18 N459295 LIM_INP vnse
R_R29 0 N1047728 2
G_G8 DIST_OUTN DIST_OUTP N1056062 N1056052 1
E_E9 N72619 VMID CMINT VMID 1
X_U22 LIMITER_INN VMID N837077 VMID VCC VEE VMID VCN_OUT VC_OUT
+ SOFT_LIM_OUTPUT
X_U28 N109210 N109423 N1047668 N1047660 N1056358 N1055868 P2P P2N ERR_1
+ ERR_2 ERR_3 VMID ERR
R_R12 FBP OUTPINT 25
R_R30 0 N1047706 2
R_R16 N109210 N109423 1k
C_C15 P2N P2P 15p
C_C16 VMID N436166 400f
R45 VMID N436166 2300
R_R41 N1047706 N1047728 4
R_R27 N1056358 N1055958 1
E_E1 VMID 0 VCC N00961 0.5
V_V3 N891663 N436166 0.25mVdc
R_R31 0 N1056062 2
*E_E3 CMCALC VMID OUTP N07972 0.5
E_E3 CMCALC VMID OUTPINT N07972 0.5
R_R33 CNTRL_OUT COMP_IN 1k
X_U21 LIMITER_INP VMID N826132 VMID VCC VEE VMID VCN_OUT VC_OUT
+ SOFT_LIM_OUTPUT
C_C10 N1047668 N1047728 125p
C_C18 N459295 N436166 100f
X_U24 CNTRL_OUT INP INN VCC VEE VMID PD GND CONTROL
R_R28 N1055868 N1055882 1
R_R10 N72619 N65800 500
C_C17 N459295 VMID 400f
R46 N459295 VMID 2300
G_G1 VCC VMID IOUTP VMID 1
R_R32 0 N1056052 2 TC=0,0
E_E2 N00961 0 0 VEE 1
C_C11 N1047660 N1047706 125p
X_U29 GBW_INN LIM_INN VCC VEE VMID IN_LIM
R_R15 VEE PD 200k
C_C9 N1055882 N1055958 8n
*X_U23 N891663 N459295 femt
X_U123 VMID N891663 femt
X_U223 N459295 VMID femt
E_E13 N837077 VMID DIST_OUTN N805589 1
X_U12 GBW_OUTP GBW_OUTN GBW_INP GBW_INN SHDN VMID GBW_SLEW_FDA
X_U26 INN INP ERR_1 VCC VEE VMID CM1_MON
C_C12 N1056358 N1056062 40p
C_C8 N1047868 N1047716 4.5n
E_E12 N798182 VMID VMID CM_OUT 1
V_VCN_OUT VCN_OUT VMID 0.01Vdc
R_R36 P2N P2P 2
R_R19 DIST_OUTN DIST_OUTP 2
E_E14 N805589 VMID VMID CM_OUT 1
E_E7 CM_OUT N15690 U3_OUTP U3_OUTN 1
C_C13 N1055868 N1056052 40p
C_C1 VMID CMINT 1f
R_R34 INN N436166 1
R_R35 INP N459295 1
V_VCMoff CM CMINT 27mVdc
X_H2 N18027 OUTNINT IOUTN VMID DEV_SCH_H2
V_VC_OUT VC_OUT VMID 1.5Vdc
G_G7 DIST_OUTN DIST_OUTP N1047728 N1047706 1
*E_E4 N07972 VMID VMID OUTN 1
E_E4 N07972 VMID VMID OUTNINT 1
R_R14 FBN OUTNINT 25
G_G9 P2P P2N GBW_OUTP GBW_OUTN -1
G_G4 DIST_OUTN DIST_OUTP N1055958 N1055882 1
R_R18 VMID DIST_OUTP 1
E_E11 N826132 VMID DIST_OUTP N798182 1
C_C4 0 N1047716 9n
I_I2 N459295 VMID DC 65.7uAdc
R_R25 N1047668 N1047716 1
C_C6 0 N1055958 16n
I_I1 N891663 VMID DC 66.3uAdc
R_R37 VMID P2P 1
V_V1 N501608 VMID 0.5
X_U27 OUTP OUTN ERR_2 ERR_3 VCC VEE VMID CM2_MON
G_G3 DIST_OUTN DIST_OUTP N1047716 N1047868 1
X_S1 SHDN VMID VCC VEE DEV_SCH_S1
X_U14 SHDN COMP_IN N501608 VMID COMPARATOR
C_C14 VMID COMP_IN 12p
C_C7 N1055882 0 16n
R_R26 N1047660 N1047868 1
R_R1 VMID CMINT 119k
C_C2 VMID N65800 0.1p
C_C5 N1047868 0 9n
R_R44 N1056052 N1056062 4
G_G5 DIST_OUTP DIST_OUTN P2P P2N -1
R_R17 DIST_OUTN VMID 1
X_S3 SHDN VMID N18027 N15690 DEV_SCH_S3
R_R21 OUTNINT OUTN 10
R_R38 P2N VMID 1
E_E10 LIM_INN VMID N891663 VMID 1.0005
.ENDS
*$
*
.subckt DEV_SCH_S2 1 2 3 4
S_S2 3 4 1 2 _S2
RS_S2 1 2 1G
.MODEL _S2 VSWITCH Roff=1e6 Ron=1.0 Voff=0.2V Von=0.8V
.ends DEV_SCH_S2
*$
*
.subckt DEV_SCH_H1 1 2 3 4
H_H1 3 4 VH_H1 1
VH_H1 1 2 0V
.ends DEV_SCH_H1
*$
*
.subckt DEV_SCH_H2 1 2 3 4
H_H2 3 4 VH_H2 -1
VH_H2 1 2 0V
.ends DEV_SCH_H2
*$
*
.subckt DEV_SCH_S1 1 2 3 4
S_S1 3 4 1 2 _S1
RS_S1 1 2 1G
.MODEL _S1 VSWITCH Roff=1700 Ron=90 Voff=0.2V Von=0.8V
.ends DEV_SCH_S1
*$
*
.subckt DEV_SCH_S3 1 2 3 4
S_S3 3 4 1 2 _S3
RS_S3 1 2 1G
.MODEL _S3 VSWITCH Roff=1e6 Ron=1.0 Voff=0.2V Von=0.8V
.ends DEV_SCH_S3
*$
.SUBCKT VNSE 1 2
.PARAM NLF = 9.5
.PARAM FLW = 100
.PARAM NVR = 1.3
.PARAM GLF={PWR(FLW,0.25)*NLF/1164}
.PARAM RNV={1.184*PWR(NVR,2)}
.MODEL DVN D KF={PWR(FLW,0.5)/1E11} IS=1.0E-16
I1 0 7 10E-3
I2 0 8 10E-3
D1 7 0 DVN
D2 8 0 DVN
E1 3 6 7 8 {GLF}
R1 3 0 1E9
R2 3 0 1E9
R3 3 6 1E9
E2 6 4 5 0 10
R4 5 0 {RNV}
R5 5 0 {RNV}
R6 3 4 1E9
R7 4 0 1E9
E3 1 2 3 4 1
C1 1 0 1E-15
C2 2 0 1E-15
C3 1 2 1E-15
.ENDS
*$
.SUBCKT FEMT 1 2
.PARAM NLFF = 2500
.PARAM FLWF = 50e3
.PARAM NVRF = 2900
.PARAM GLFF={PWR(FLWF,0.25)*NLFF/1164}
.PARAM RNVF={1.184*PWR(NVRF,2)}
.MODEL DVNF D KF={PWR(FLWF,0.5)/1E11} IS=1.0E-16
I1 0 7 10E-3
I2 0 8 10E-3
D1 7 0 DVNF
D2 8 0 DVNF
E1 3 6 7 8 {GLFF}
R1 3 0 1E9
R2 3 0 1E9
R3 3 6 1E9
E2 6 4 5 0 10
R4 5 0 {RNVF}
R5 5 0 {RNVF}
R6 3 4 1E9
R7 4 0 1E9
G1 1 2 3 4 1E-6
C1 1 0 1E-15
C2 2 0 1E-15
C3 1 2 1E-15
.ENDS
*$
*
.SUBCKT IN_LIM OUT IN VCC VEE GNDF
.PARAM V1 = 1.2
.PARAM V2 = 0.2
EMAX NMAX GNDF VALUE = {V(VCC,GNDF) - V1}
EMIN NMIN GNDF VALUE = {V(VEE,GNDF) - V2}
EOUT OUT GNDF VALUE = {MAX(MIN(V(IN,GNDF),V(NMAX,GNDF)),V(NMIN,GNDF))}
.ENDS
*$
*
.SUBCKT LIMITER OUTP OUTN INP INN GNDF VCC VEE VCP VCN
.PARAM VHRP0 = 1
.PARAM VHRN0 = -1
.PARAM GAIN = 0.5
.PARAM ROUT = 100
.PARAM V_ISC = 0.1
.PARAM V_IOUT1 = 0.06
.PARAM ROS = 5
EZ1 NZ1 GNDF VALUE = {V(VCC,GNDF)}
EZ2 NZ2 GNDF VALUE = {V(VCC,GNDF)-VHRP0}
EHRK NHRK GNDF VALUE = {((V(VCC,GNDF)-VHRP0)/(V_ISC-V_IOUT1))-ROS}
EHRP VHRP GNDF VALUE = {MAX(MIN(VHRP0+(V(VCP,GNDF)-V_IOUT1)*V(NHRK,GNDF),V(VCC,GNDF)),VHRP0)}
EHRN VHRN GNDF VALUE = {MAX(MIN(VHRN0+(V(VCN,GNDF)+V_IOUT1)*V(NHRK,GNDF),VHRN0),V(VEE,GNDF))}
EUL NUL GNDF VALUE = {V(VCC,GNDF) - V(VHRP,GNDF)}
ELL NLL GNDF VALUE = {V(VEE,GNDF) - V(VHRN,GNDF)}
RVCP_TERM VCP GNDF 1k
RVCN_TERM VCN GNDF 1k
EOUT OUTP OUTN VALUE = {MIN(MAX(GAIN*V(INP,INN),V(NLL,GNDF)),V(NUL,GNDF))}
ROUT1+ OUTP GNDF {ROUT}
ROUT1- OUTN GNDF {ROUT}
.ENDS
*$
*
.SUBCKT CM_CL_GAIN OUTP OUTN INP INN SHDN GNDF
.PARAM GAIN = 1e4
E1 OUTP OUTN VALUE = {GAIN*V(INP,INN)*V(SHDN,GNDF)}
.ENDS
*$
*
*
.SUBCKT SOFT_LIM_OUTPUT OUTP OUTN INP INN VCC VEE GNDF VCN VC1
.PARAM NORDER = 5
.PARAM GAIN = 1
** VCN is the headroom to mimic the CLAW curve
** VC1 is the first threshold that begins limiting. It marks the point
** where distortion increases dramatically for increasing output swing
*EHR N_HR GNDF VALUE = {V(VCC,VCN)}
EVC1 N_VC1 GNDF VALUE = {V(VC1,GNDF)}
EHR N_OMAX GNDF VALUE = {V(VCC,VCN)}
EDV N_DV GNDF VALUE = {(2/(NORDER-2))*(V(N_OMAX,GNDF)/GAIN - V(VC1,GNDF))}
EIN N_IN GNDF VALUE = {V(INP,INN)}
EV1 N_V1 GNDF VALUE = {V(VC1,GNDF)}
EV2 N_V2 GNDF VALUE = {V(VC1,GNDF) + V(N_DV,GNDF)}
EV3 N_V3 GNDF VALUE = {V(VC1,GNDF) + 2*V(N_DV,GNDF)}
EV4 N_V4 GNDF VALUE = {V(VC1,GNDF) + 3*V(N_DV,GNDF)}
EV5 N_V5 GNDF VALUE = {V(VC1,GNDF) + 4*V(N_DV,GNDF)}
EG1 N_G1 GNDF VALUE = {GAIN}
EG2 N_G2 GNDF VALUE = {0.75*GAIN}
EG3 N_G3 GNDF VALUE = {0.50*GAIN}
EG4 N_G4 GNDF VALUE = {0.25*GAIN}
EG5 N_G5 GNDF VALUE = {0*GAIN}
EB1 N_B1 GNDF VALUE = {0}
EB2 N_B2 GNDF VALUE = {V(N_B1,GNDF) + 1*(GAIN/(NORDER-1))
+ *(V(N_V5,GNDF) - NORDER*V(N_DV,GNDF) + 1*V(N_DV,GNDF))}
EB3 N_B3 GNDF VALUE = {V(N_B1,GNDF) + 2*(GAIN/(NORDER-1))
+ *(V(N_V5,GNDF) - NORDER*V(N_DV,GNDF) + 1.5*V(N_DV,GNDF))}
EB4 N_B4 GNDF VALUE = {V(N_B1,GNDF) + 3*(GAIN/(NORDER-1))
+ *(V(N_V5,GNDF) - NORDER*V(N_DV,GNDF) + 2*V(N_DV,GNDF))}
EB5 N_B5 GNDF VALUE = {V(N_B1,GNDF) + 4*(GAIN/(NORDER-1))
+ *(V(N_V5,GNDF) - NORDER*V(N_DV,GNDF) + 2.5*V(N_DV,GNDF))}
E1U N_1U GNDF VALUE = {V(N_G1,GNDF)*V(N_IN,GNDF)}
E2U N_2U GNDF VALUE = {V(N_G2,GNDF)*V(N_IN,GNDF) + V(N_B2,GNDF)}
E3U N_3U GNDF VALUE = {V(N_G3,GNDF)*V(N_IN,GNDF) + V(N_B3,GNDF)}
E4U N_4U GNDF VALUE = {V(N_G4,GNDF)*V(N_IN,GNDF) + V(N_B4,GNDF)}
E5U N_5U GNDF VALUE = {V(N_G5,GNDF)*V(N_IN,GNDF) + V(N_B5,GNDF)}
E2L N_2L GNDF VALUE = {V(N_G2,GNDF)*V(N_IN,GNDF) - V(N_B2,GNDF)}
E3L N_3L GNDF VALUE = {V(N_G3,GNDF)*V(N_IN,GNDF) - V(N_B3,GNDF)}
E4L N_4L GNDF VALUE = {V(N_G4,GNDF)*V(N_IN,GNDF) - V(N_B4,GNDF)}
E5L N_5L GNDF VALUE = {V(N_G5,GNDF)*V(N_IN,GNDF) - V(N_B5,GNDF)}
EX1 N_X1 GNDF VALUE = {MIN(MAX(V(N_1U,GNDF),V(N_2L,GNDF)),V(N_2U,GNDF))}
EX2 N_X2 GNDF VALUE = {MIN(MAX(V(N_X1,GNDF),V(N_3L,GNDF)),V(N_3U,GNDF))}
EX3 N_X3 GNDF VALUE = {MIN(MAX(V(N_X2,GNDF),V(N_4L,GNDF)),V(N_4U,GNDF))}
EX4 OUTP OUTN VALUE = {MIN(MAX(V(N_X3,GNDF),V(N_5L,GNDF)),V(N_5U,GNDF))}
ROUTP OUTP GNDF 100
ROUTN OUTN GNDF 100
ROUTD OUTP OUTN 200
.ENDS
*$
**
.SUBCKT ERR OUT1P OUT1N OUT2P OUT2N OUT3P OUT3N INP INN IN1 IN2 IN3 GNDF
.PARAM a0 = 0
.PARAM a1 = 1
.PARAM a2 = {0.00115}
.PARAM a3 = {0.005}
.PARAM LL = -1000
.PARAM UL = 1000
Eid DIFF_IN 0 VALUE = {V(INP) - V(INN)}
EIN1 N1 0 VALUE = {V(IN1,GNDF)}
EIN2 N2 0 VALUE = {V(IN2,GNDF)}
EIN3 N3 0 VALUE = {V(IN3,GNDF)}
E1 OUT1P OUT1N VALUE = {MAX(MIN(a1*V(DIFF_IN),UL),LL)}
E2 OUT2P OUT2N VALUE = {MAX(MIN(a2*V(N1)*V(N2)*PWR(V(DIFF_IN),2),UL),LL)}
E3 OUT3P OUT3N VALUE = {MAX(MIN(a3*V(N1)*V(N3)*PWRS(V(DIFF_IN),3),UL),LL)}
RE1+ OUT1P 0 100
RE1- 0 OUT1N 100
RE1d OUT1P OUT1N 200
RE2+ OUT2P 0 100
RE2- 0 OUT2N 100
RE2d OUT2P OUT2N 200
RE3+ OUT3P 0 100
RE3- 0 OUT3N 100
RE3d OUT3P OUT3N 200
.ENDS
*$
**
.SUBCKT CONTROL OUT INP INN VCC VEE GNDF PD GND
.PARAM VS_MAX = 5.5
.PARAM VIH = 0.5
.PARAM VIL = 0.5
.PARAM VIMID = 1.1
****
EVSTEST NVSTEST GNDF VALUE = {IF(V(VCC,VEE) > VS_MAX,0,1)}
EVICM NVICM GNDF VALUE = {0.5*(V(INP,GNDF)+V(INN,GNDF))}
EVICMMAXTEST NVICMMAXTEST GNDF VALUE = {IF(V(NVICM,GNDF) > V(VCC,GNDF)+VIH,0,1)}
EVICMMINTEST NVICMMINTEST GNDF VALUE = {IF(V(NVICM,GNDF) < V(VEE,GNDF)-VIL,0,1)}
* for this version, PD is inverted and ref<65>d to ground, not VEE *
EPD NPD GNDF VALUE = {1 - MAX(MIN(1000*(V(PD,GND)-VIMID),1),0)}
EOUT OUT GNDF VALUE = {V(NVSTEST,GNDF)*V(NVICMMAXTEST,GNDF)
+*V(NVICMMINTEST,GNDF)*V(NPD,GNDF)}
.ENDS
*$
**
*
*
.SUBCKT GBW_SLEW_FDA OUTP OUTN INP INN SHDN GNDF
.PARAM Aol = 57
.PARAM GBW = 14e9
.PARAM SRP = 20e9
.PARAM SRN = 20e9
.PARAM IT = 0.001
.PARAM PI = 3.141592
.PARAM IP = {IT*MAX(1,SRP/SRN)}
.PARAM IN = {IT*MIN(-1,-SRN/SRP)}
.PARAM CC = {IT*MAX(1/SRP,1/SRN)}
.PARAM FP = {GBW/PWR(10,AOL/20)}
.PARAM RC = {1/(2*PI*CC*FP)}
.PARAM GC = {PWR(10,AOL/20)/RC}
* Loading the VO pin with an external resistor will change the AOL.
G1p GNDF OUTP VALUE = {MAX(MIN(GC*V(SHDN,GNDF)*V(INP,INN),IP),IN)}
G1n OUTN GNDF VALUE = {MAX(MIN(GC*V(SHDN,GNDF)*V(INP,INN),IP),IN)}
RG1p OUTP GNDF {0.5*RC}
Cg1dp OUTP GNDF {2*CC}
RG1n OUTN GNDF {0.5*RC}
Cg1dn OUTN GNDF {2*CC}
.ENDS
*$
*
.SUBCKT CM1_MON IN1 IN2 OUT VCC VEE GNDF
.PARAM VOS = -0.5
.PARAM VMH = 1400
.PARAM VML = -1400
.PARAM VDH = 0.55
.PARAM VDL = -0.55
EC NC GNDF VALUE = {0.5*(V(IN1,GNDF)+V(IN2,GNDF)) - VOS}
EBL NBL 0 VALUE = {-VML*(V(VEE,GNDF)- VDL)}
EBH NBH 0 VALUE = {-VMH*(V(VCC,GNDF)- VDH)}
EL1 NLL GNDF VALUE = {VML*V(NC,GNDF) + V(NBL)}
EL2 NLH GNDF VALUE = {VMH*V(NC,GNDF) + V(NBH)}
EO1 OUT GNDF VALUE = {MAX(MAX(V(NLL,GNDF),V(NLH,GNDF)),1)}
.ENDS
*$
*
.SUBCKT CM2_MON IN1 IN2 OUT2 OUT3 VCC VEE GNDF
.PARAM VOS = 0
.PARAM VM2H = 114.3
.PARAM VM2L = -30.91
.PARAM VD2H = 1.45
.PARAM VD2L = -1.55
.PARAM VM3H = 100
.PARAM VM3L = -100
.PARAM VD3 = 1.8
EB2H NB2H 0 VALUE = {-VM2H*(V(VCC,GNDF)-VD2H)}
EB2L NB2L 0 VALUE = {-VM2L*(V(VEE,GNDF)-VD2L)}
EB3H NB3H 0 VALUE = {-VM3H*(V(VCC,GNDF)-VD3)}
EB3L NB3L 0 VALUE = {-VM3H*(V(VCC,GNDF)-VD3)}
EC NC GNDF VALUE = {0.5*(V(IN1,GNDF)+V(IN2,GNDF)) - VOS}
EH2 NH2 GNDF VALUE = {VM2H*V(NC,GNDF) + V(NB2H)}
EL2 NL2 GNDF VALUE = {VM2L*V(NC,GNDF) + V(NB2L)}
EH3 NH3 GNDF VALUE = {VM3H*V(NC,GNDF) + V(NB3H)}
EL3 NL3 GNDF VALUE = {VM3L*V(NC,GNDF) + V(NB3L)}
EO2 OUT2 GNDF VALUE = {MAX(MAX(V(NH2,GNDF),V(NL2,GNDF)),1)}
EO3 OUT3 GNDF VALUE = {MAX(MAX(V(NH3,GNDF),V(NL3,GNDF)),1)}
.ENDS
*$
*
.SUBCKT COMPARATOR OUT IN REF GNDF
.PARAM VOUT_MAX = 1
.PARAM VOUT_MIN = 0
.PARAM GAIN = 1e4
EOUT OUT GNDF VALUE = {MAX(MIN(GAIN*V(IN,REF),VOUT_MAX),VOUT_MIN)}
.ENDS
*$

4546
spice/test/OptiMOS2_100V.lib Executable file
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324
spice/test/opa836_a.lib Executable file
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* OPA836 - Rev. A
* Created by Sean Cashin; 2020-03-24
* Created with Green-Williams-Lis Current Sense Amp Macro-model Architecture
* Copyright 2020 by Texas Instruments Corporation
******************************************************
* MACRO-MODEL SIMULATED PARAMETERS:
******************************************************
* AC PARAMETERS
**********************
* CLOSED-LOOP OUTPUT IMPEDANCE VS. FREQUENCY (Zout vs. Freq.)
* CLOSED-LOOP GAIN AND PHASE VS. FREQUENCY WITH RL, CL EFFECTS (Acl vs. Freq.)
* COMMON-MODE REJECTION RATIO VS. FREQUENCY (CMRR vs. Freq.)
* POWER SUPPLY REJECTION RATIO VS. FREQUENCY (PSRR vs. Freq.)
* INPUT VOLTAGE NOISE DENSITY VS. FREQUENCY (en vs. Freq.)
**********************
* DC PARAMETERS
**********************
* INPUT COMMON-MODE VOLTAGE RANGE (Vcm)
* GAIN ERROR (Eg)
* INPUT BIAS CURRENT VS. INPUT COMMON-MODE VOLTAGE (Ib vs. Vcm)
* INPUT OFFSET VOLTAGE VS. TEMPERATURE (Vos vs. Temp)
* OUTPUT VOLTAGE SWING vs. OUTPUT CURRENT (Vout vs. Iout)
* SHORT-CIRCUIT OUTPUT CURRENT (Isc)
* QUIESCENT CURRENT (Iq)
**********************
* TRANSIENT PARAMETERS
**********************
* SLEW RATE (SR)
* SETTLING TIME VS. CAPACITIVE LOAD (ts)
* OVERLOAD RECOVERY TIME (tor)
******************************************************
.subckt OPA836 IN+ IN- OUT VCC VEE Vnot_pd
******************************************************
.MODEL R_NOISELESS RES (T_ABS=-273.15)
C_C1 LN CLAMP 4.33E-9
C_C1A16 N1102900 N1102910 16.12E-9
C_C1A17 N1102916 N709248 159.2E-12
C_C1A33 N1106172 N1106182 16.12E-9
C_C1A34 N1106188 N706294 159.2E-12
C_C33 N406634 0 1E-15
C_C34 N317950 0 1
C_C35 N406794 0 1E-15
C_C39 N1252259 N1252249 350E-9
C_C41 N1268170 N1268207 80E-15
C_C44 N1464277 LN 100E-12
C_C45 LN N1464195 400E-12
C_C46 LN N1464227 170E-12
C_C47 N1480336 N1480326 20E-15
C_C48 N1682969 LN 200P
C_C7 N31014 LN 1P
C_C_CMN LN ESDN 1.2E-12
C_C_CMN1 ESDN ESDP 1E-12
C_C_CMP ESDP LN 1.2E-12
C_C_VIMON LN VIMON 1E-9
C_C_VOUT_S LN VOUT_S 1E-12
E_E3 N112292 LN OUT LN 1
E_E6 LN 0 N317950 0 1
E_E7 VCCC 0 VCC 0 1
E_E8 VEEE 0 VEE 0 1
G_G100 N1480326 LN N1268170 LN -10
G_G101 LP LN N1464227 LN -1
G_G102 N1464195 LN CLAMP LN -1
G_G103 N1464227 LN N1464195 LN -1
G_G104 N1254878 LN N1480336 LN -240
G_G106 N1106172 LN VEE_B LN -403E-3
G_G107 VCC_CLP VEEE VCC_B VEE_B -1
G_G108 VEE_CLP VCCC VCC_B VEE_B 1
G_G109 N1619882 0 VIMON LN 15
G_G110 0 VEE_CLP LN VIMON 6
G_G111 VCC VEE N1682969 LN 1E-3
G_G36 VCC_B 0 VCC 0 -1
G_G37 VEE_B 0 VEE 0 -1
G_G6 N25816 N11984 N709248 N706294 -1E-3
G_G77 N1106188 LN N1106182 LN -2
G_G87 N1102900 LN VCC_B LN -403E-3
G_G88 N1102916 LN N1102910 LN -2
G_G96 N1252249 LN N1464277 ZOUT -90.91
G_G98 N1263527 LN N1252259 LN -22
I_I1 VNOT_PD 0 DC 20N
I_I_B N06456 LN DC 650E-9
I_I_OS ESDN LN DC 620E-9
I_I_Q VCC VEE DC 5E-6
L_L1 LP N1464277 1E-9
R_R1 ESDP IN+ R_NOISELESS 10E-3
R_R10 ESDN N11991 R_NOISELESS 1E-3
R_R107 VCC_B 0 R_NOISELESS 1
R_R108 N317950 0 R_NOISELESS 1E12
R_R109 VEE_B 0 R_NOISELESS 1
R_R110 VCC_B N406634 R_NOISELESS 1E-3
R_R111 N406634 N317950 R_NOISELESS 1E6
R_R112 N317950 N406794 R_NOISELESS 1E6
R_R113 N406794 VEE_B R_NOISELESS 1E-3
R_R148 N1102916 LN R_NOISELESS 1
R_R162 ESDN ESDP R_NOISELESS 200E3
R_R183 N1102900 LN R_NOISELESS 1
R_R185 N1106172 LN R_NOISELESS 1
R_R186 N1106188 LN R_NOISELESS 1
R_R1A16 N1102916 N709248 R_NOISELESS 10E3
R_R1A31 N1102900 N1102910 R_NOISELESS 10E3
R_R1A33 N1106172 N1106182 R_NOISELESS 10E3
R_R1A34 N1106188 N706294 R_NOISELESS 10E3
R_R2 ESDN IN- R_NOISELESS 10E-3
R_R208 N1252259 N1252249 R_NOISELESS 10E3
R_R209 LN N1252249 R_NOISELESS 1
R_R21 N11984 N25816 R_NOISELESS 1E3
R_R210 LN N1252259 R_NOISELESS 500
R_R211 LN N1254878 R_NOISELESS 1
R_R212 LN ZOUT R_NOISELESS 3000
R_R213 ZOUT N1254878 R_NOISELESS 30000
R_R218 LN N1263527 R_NOISELESS 1
R_R219 LN N1268207 R_NOISELESS 10E3
R_R220 N1268170 N1263527 R_NOISELESS 90E3
R_R226 LN N1464277 R_NOISELESS 14
R_R230 LN N1464195 R_NOISELESS 1
R_R231 LN N1464227 R_NOISELESS 1
R_R243 N1480336 N1480326 R_NOISELESS 10E3
R_R244 LN N1480326 R_NOISELESS 1
R_R245 LN N1480336 R_NOISELESS 20
R_R248 VCC_CLP N1619882 R_NOISELESS 1E-3
R_R25 LN N28602 R_NOISELESS 1E9
R_R251 LN LP R_NOISELESS 1
R_R254 LN AOLNET R_NOISELESS 1E6
R_R255 LN N1682945 R_NOISELESS 1
R_R26 N30136 LN R_NOISELESS 1E9
R_R27 LN N30913 R_NOISELESS 1
R_R28 N31014 N30913 R_NOISELESS 1E-3
R_R2A17 N1102910 LN R_NOISELESS 99.73
R_R2A18 N709248 LN R_NOISELESS 5
R_R2A34 N1106182 LN R_NOISELESS 99.73
R_R2A35 N706294 LN R_NOISELESS 5
R_R3 LN ESDP R_NOISELESS 200E3
R_R4 ESDN LN R_NOISELESS 200E3
R_R8 N638941 N11006 R_NOISELESS 1E3
R_R81 LN VIMON R_NOISELESS 1
R_R83 LN N112292 R_NOISELESS 1E9
R_R9 N11006 N11984 R_NOISELESS 1E-3
R_R_VOUT_S VOUT_S N112292 R_NOISELESS 100
V_V4 N1682557 LN 1VDC
V_VCM_MAX N30136 VCC_B -1.1
V_VCM_MIN N28602 VEE_B -0.2
X_ESD_OUT OUT VCC VEE ESD_OUT_OPA836
X_E_N ESDP N06456 VNSE_OPA836
X_F1 VOUT OUT LN VIMON 08_OP_AMP_COMPLETE_F1_OPA836
X_IQ_N LN VIMON LN VEE IQ_SRC_OPA836
X_IQ_P VIMON LN VCC LN IQ_SRC_OPA836
X_I_NP1 ESDN LN FEMT_OPA836
X_S10 OUT VCC_CLP LN LP 08_OP_AMP_COMPLETE_S10_OPA836
X_S11 VNOT_PD VEEE N1682945 N1682557 08_OP_AMP_COMPLETE_S11_OPA836
X_S12 N1682969 N1682945 N1682969 N1682945 08_OP_AMP_COMPLETE_S12_OPA836
X_S13 N1682969 LN AOLNET LN 08_OP_AMP_COMPLETE_S13_OPA836
X_S14 N1682969 LN VOUT ZOUT 08_OP_AMP_COMPLETE_S14_OPA836
X_S3 VIMON LN VCC_CLP VEEE 08_OP_AMP_COMPLETE_S3_OPA836
X_S4 LN VIMON VEE_CLP VCCC 08_OP_AMP_COMPLETE_S4_OPA836
X_S7 VEE_CLP OUT CLAMP LN 08_OP_AMP_COMPLETE_S7_OPA836
X_S8 OUT VCC_CLP CLAMP LN 08_OP_AMP_COMPLETE_S8_OPA836
X_S9 VEE_CLP OUT LN LP 08_OP_AMP_COMPLETE_S9_OPA836
X_U1 LN N06456 FEMT_OPA836
X_U2 N31014 N11991 AOLNET LN AOL_1_OPA836
X_U3 AOLNET LN CLAMP LN AOL_2_OPA836
X_VCM_CLAMP N25816 LN N30913 LN N30136 N28602 VCM_CLAMP_OPA836
X_VOS_DRIFT N749288 N06456 VOS_DRIFT_OPA836
X_VOS_VS_VCM N638941 N749288 VCC VEE VOS_VS_VCM_OPA836
.ENDS OPA836
*
.SUBCKT 08_OP_AMP_COMPLETE_F1_OPA836 1 2 3 4
F_F1 3 4 VF_F1 1
VF_F1 1 2 0V
.ENDS 08_OP_AMP_COMPLETE_F1_OPA836
*
.SUBCKT 08_OP_AMP_COMPLETE_S10_OPA836 1 2 3 4
S_S10 3 4 1 2 _S10
RS_S10 1 2 1G
.MODEL _S10 VSWITCH ROFF=2E6 RON=1E-3 VOFF=-0.1 VON=0.06
.ENDS 08_OP_AMP_COMPLETE_S10_OPA836
*
.SUBCKT 08_OP_AMP_COMPLETE_S11_OPA836 1 2 3 4
S_S11 3 4 1 2 _S11
RS_S11 1 2 1G
.MODEL _S11 VSWITCH ROFF=1E9 RON=1E-3 VOFF=0.7 VON=2.1
.ENDS 08_OP_AMP_COMPLETE_S11_OPA836
*
.SUBCKT 08_OP_AMP_COMPLETE_S12_OPA836 1 2 3 4
S_S12 3 4 1 2 _S12
RS_S12 1 2 1G
.MODEL _S12 VSWITCH ROFF=700 RON=250 VOFF=-0.3 VON=0.1
.ENDS 08_OP_AMP_COMPLETE_S12_OPA836
*
.SUBCKT 08_OP_AMP_COMPLETE_S13_OPA836 1 2 3 4
S_S13 3 4 1 2 _S13
RS_S13 1 2 1G
.MODEL _S13 VSWITCH ROFF=0.001 RON=1E6 VOFF=0.3 VON=0.7
.ENDS 08_OP_AMP_COMPLETE_S13_OPA836
*
.SUBCKT 08_OP_AMP_COMPLETE_S14_OPA836 1 2 3 4
S_S14 3 4 1 2 _S14
RS_S14 1 2 1G
.MODEL _S14 VSWITCH ROFF=10MEG RON=21E-3 VOFF=0.3 VON=0.7
.ENDS 08_OP_AMP_COMPLETE_S14_OPA836
*
.SUBCKT 08_OP_AMP_COMPLETE_S3_OPA836 1 2 3 4
S_S3 3 4 1 2 _S3
RS_S3 1 2 1G
.MODEL _S3 VSWITCH ROFF=1 RON=1E-3 VOFF=55E-3 VON=80E-3
.ENDS 08_OP_AMP_COMPLETE_S3_OPA836
*
.SUBCKT 08_OP_AMP_COMPLETE_S4_OPA836 1 2 3 4
S_S4 3 4 1 2 _S4
RS_S4 1 2 1G
.MODEL _S4 VSWITCH ROFF=1 RON=1E-3 VOFF=55E-3 VON=80E-3
.ENDS 08_OP_AMP_COMPLETE_S4_OPA836
*
.SUBCKT 08_OP_AMP_COMPLETE_S7_OPA836 1 2 3 4
S_S7 3 4 1 2 _S7
RS_S7 1 2 1G
.MODEL _S7 VSWITCH ROFF=2E6 RON=1E-3 VOFF=-0.1 VON=0.06
.ENDS 08_OP_AMP_COMPLETE_S7_OPA836
*
.SUBCKT 08_OP_AMP_COMPLETE_S8_OPA836 1 2 3 4
S_S8 3 4 1 2 _S8
RS_S8 1 2 1G
.MODEL _S8 VSWITCH ROFF=2E6 RON=1E-3 VOFF=-0.1 VON=0.06
.ENDS 08_OP_AMP_COMPLETE_S8_OPA836
*
.SUBCKT 08_OP_AMP_COMPLETE_S9_OPA836 1 2 3 4
S_S9 3 4 1 2 _S9
RS_S9 1 2 1G
.MODEL _S9 VSWITCH ROFF=2E6 RON=1E-3 VOFF=-0.1 VON=0.06
.ENDS 08_OP_AMP_COMPLETE_S9_OPA836
*
.SUBCKT AOL_1_OPA836 VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 1E-4
.PARAM IPOS = .5
.PARAM INEG = -.5
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
.ENDS AOL_1_OPA836
*
.SUBCKT AOL_2_OPA836 VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 0.0286
.PARAM IPOS = 1.96
.PARAM INEG = -2.03
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
.ENDS AOL_2_OPA836
*
.SUBCKT ESD_OUT_OPA836 OUT VCC VEE
.MODEL ESD_SW VSWITCH(RON=50 ROFF=1E12 VON=500E-3 VOFF=450E-3)
S1 VCC OUT OUT VCC ESD_SW
S2 OUT VEE VEE OUT ESD_SW
.ENDS ESD_OUT_OPA836
*
.SUBCKT FEMT_OPA836 1 2
.PARAM FLWF=1
.PARAM NLFF=100
.PARAM NVRF=0.75
.PARAM GLFF={PWR(FLWF,0.25)*NLFF/1164}
.PARAM RNVF={1.184*PWR(NVRF,2)}
.MODEL DNVF D KF={PWR(FLWF,0.5)/1E11} IS=1.0E-16
I1 0 7 10E-3
I2 0 8 10E-3
D1 7 0 DNVF
D2 8 0 DNVF
E1 3 6 7 8 {GLFF}
R1 3 0 1E9
R2 3 0 1E9
R3 3 6 1E9
E2 6 4 5 0 10
R4 5 0 {RNVF}
R5 5 0 {RNVF}
R6 3 4 1E9
R7 4 0 1E9
G1 1 2 3 4 1E-6
.ENDS FEMT_OPA836
*
.SUBCKT IQ_SRC_OPA836 VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 1E-3
G1 IOUT+ IOUT- VALUE={IF( (V(VC+,VC-)<=0),0,GAIN*V(VC+,VC-) )}
.ENDS IQ_SRC_OPA836
*
.SUBCKT VCM_CLAMP_OPA836 VIN+ VIN- IOUT- IOUT+ VP+ VP-
.PARAM GAIN = 1
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VIN+,VIN-),V(VP-,VIN-), V(VP+,VIN-))}
.ENDS VCM_CLAMP_OPA836
*
.SUBCKT VNSE_OPA836 1 2
.PARAM FLW=1
.PARAM NLF=75
.PARAM NVR=4.6
.PARAM GLF={PWR(FLW,0.25)*NLF/1164}
.PARAM RNV={1.184*PWR(NVR,2)}
.MODEL DVN D KF={PWR(FLW,0.5)/1E11} IS=1.0E-16
I1 0 7 10E-3
I2 0 8 10E-3
D1 7 0 DVN
D2 8 0 DVN
E1 3 6 7 8 {GLF}
R1 3 0 1E9
R2 3 0 1E9
R3 3 6 1E9
E2 6 4 5 0 10
R4 5 0 {RNV}
R5 5 0 {RNV}
R6 3 4 1E9
R7 4 0 1E9
E3 1 2 3 4 1
.ENDS VNSE_OPA836
*
.SUBCKT VOS_DRIFT_OPA836 VOS+ VOS-
.PARAM DC = 45.12E-6
.PARAM POL = 1
.PARAM DRIFT = 20E-6
E1 VOS+ VOS- VALUE={DC+POL*DRIFT*(TEMP-27)}
.ENDS VOS_DRIFT_OPA836
*
.SUBCKT VOS_VS_VCM_OPA836 V+ V- REF+ REF-
E1 V+ 1 TABLE {(V(REF+, V-))} =
+(0.35, 450E-6)
+(0.4, 435E-6)
+(0.55, 275E-6)
+(0.65, 150E-6)
+(0.75, 75E-6)
+(0.85, 25E-6)
+(1, 0)
V1 1 V- 0
.ENDS VOS_VS_VCM_OPA836
*