mirror of
https://gitlab.com/brendanhaines/ice40.git
synced 2024-09-19 20:36:12 -06:00
45 lines
905 B
Makefile
45 lines
905 B
Makefile
PROJ = top
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DEVICE = hx8k
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PACKAGE = ct256
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BUILD_DIR = build
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PIN_DEF = constraints/pins.pcf
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SOURCE_V = $(wildcard hdl/*.v)
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TESTBENCH_V = $(wildcard hdl/tb/*.v)
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all: $(BUILD_DIR) $(BUILD_DIR)/$(PROJ).rpt $(BUILD_DIR)/$(PROJ).bin
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$(BUILD_DIR):
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mkdir -p $(BUILD_DIR)
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$(BUILD_DIR)/%.blif: hdl/%.v | $(BUILD_DIR)
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yosys -p 'synth_ice40 -top top -blif $@' $(SOURCE_V)
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# yosys -p 'synth_ice40 -top top -blif $@' $<
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%.asc: $(PIN_DEF) %.blif
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arachne-pnr -d $(subst hx,,$(subst lp,,$(DEVICE))) -P $(PACKAGE) -o $@ -p $^
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%.bin: %.asc
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icepack $< $@
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%.rpt: %.asc
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icetime -d $(DEVICE) -mtr $@ $<
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prog: $(PROJ).bin
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iceprog $<
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sudo-prog: $(PROJ).bin
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@echo 'Executing prog as root!!!'
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sudo iceprog $<
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$(BUILD_DIR)/tb.out: $(SOURCE_V) $(TESTBENCH_V) | $(BUILD_DIR)
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iverilog $^ -o $@
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sim: $(BUILD_DIR)/tb.out
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cd $(BUILD_DIR) && ./tb.out
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clean:
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rm -rf $(BUILD_DIR)
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.SECONDARY:
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.PHONY: all prog clean sim
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