fix sim output location

Makefile

@@ -1,15 +1,17 @@
 PROJ = top
-PIN_DEF = pins.pcf
 DEVICE = hx8k
 PACKAGE = ct256
 BUILD_DIR = build
-
+PIN_DEF = constraints/pins.pcf
 SOURCE_V = $(wildcard hdl/*.v)
 TESTBENCH_V = $(wildcard hdl/tb/*.v)
 
-all: $(BUILD_DIR)/$(PROJ).rpt $(BUILD_DIR)/$(PROJ).bin
+all: $(BUILD_DIR) $(BUILD_DIR)/$(PROJ).rpt $(BUILD_DIR)/$(PROJ).bin
 
-$(BUILD_DIR)/%.blif: hdl/%.v
+$(BUILD_DIR):
+	mkdir -p $(BUILD_DIR)
+
+$(BUILD_DIR)/%.blif: hdl/%.v | $(BUILD_DIR)
 	yosys -p 'synth_ice40 -top top -blif $@' $(SOURCE_V)
 	# yosys -p 'synth_ice40 -top top -blif $@' $<
 
@@ -29,14 +31,11 @@ sudo-prog: $(PROJ).bin
 	@echo 'Executing prog as root!!!'
 	sudo iceprog $<
 
-$(BUILD_DIR):
-	mkdir $(BUILD_DIR)
-
-$(BUILD_DIR)/tb.out: $(BUILD_DIR) $(SOURCE_V) $(TESTBENCH_V)
+$(BUILD_DIR)/tb.out: $(SOURCE_V) $(TESTBENCH_V) | $(BUILD_DIR)
 	iverilog $^ -o $@
 
 sim: $(BUILD_DIR)/tb.out
-	$(BUILD_DIR)/tb.out
+	cd $(BUILD_DIR) && ./tb.out
 
 clean:
 	rm -rf $(BUILD_DIR)

hdl/tb/tb.gtkw

@@ -1,36 +1,23 @@
 [*]
 [*] GTKWave Analyzer v3.3.86 (w)1999-2017 BSI
-[*] Fri Jul  2 06:30:08 2021
+[*] Fri Jul  2 07:11:25 2021
 [*]
-[dumpfile] "/home/brendan/Documents/Projects/0042_ice40/hdl/tb.vcd"
-[dumpfile_mtime] "Fri Jul  2 06:30:05 2021"
-[dumpfile_size] 29504
+[dumpfile] "/home/brendan/Documents/Projects/0042_ice40/build/tb.vcd"
+[dumpfile_mtime] "Fri Jul  2 07:10:41 2021"
+[dumpfile_size] 14906
 [savefile] "/home/brendan/Documents/Projects/0042_ice40/hdl/tb/tb.gtkw"
 [timestart] 0
 [size] 1920 1052
-[pos] -1 -1
-*-19.000000 765000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
-[treeopen] tb.
-[treeopen] tb.top.
-[sst_width] 233
-[signals_width] 279
+[pos] -29 -29
+*-20.000000 739000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
+[sst_width] 223
+[signals_width] 94
 [sst_expanded] 1
-[sst_vpaned_height] 656
+[sst_vpaned_height] 311
 @28
 tb.clk
 tb.reset
-@c08022
+@8023
 tb.led[7:0]
-@28
-(0)tb.led[7:0]
-(1)tb.led[7:0]
-(2)tb.led[7:0]
-(3)tb.led[7:0]
-(4)tb.led[7:0]
-(5)tb.led[7:0]
-(6)tb.led[7:0]
-(7)tb.led[7:0]
-@1401200
--group_end
 [pattern_trace] 1
 [pattern_trace] 0