ice40/Makefile

PROJ = top
DEVICE = hx8k
PACKAGE = ct256
BUILD_DIR = build
PIN_DEF = constraints/pins.pcf
SOURCE_V = $(wildcard hdl/*.v)
TESTBENCH_V = $(wildcard hdl/tb/*.v)

all: $(BUILD_DIR) $(BUILD_DIR)/$(PROJ).rpt $(BUILD_DIR)/$(PROJ).bin

$(BUILD_DIR):
	mkdir -p $(BUILD_DIR)

$(BUILD_DIR)/%.blif: hdl/%.v | $(BUILD_DIR)
	yosys -p 'synth_ice40 -top top -blif $@' $(SOURCE_V)
	# yosys -p 'synth_ice40 -top top -blif $@' $<

%.asc: $(PIN_DEF) %.blif
	arachne-pnr -d $(subst hx,,$(subst lp,,$(DEVICE))) -P $(PACKAGE) -o $@ -p $^

%.bin: %.asc
	icepack $< $@

%.rpt: %.asc
	icetime -d $(DEVICE) -mtr $@ $<

prog: $(PROJ).bin
	iceprog $<

sudo-prog: $(PROJ).bin
	@echo 'Executing prog as root!!!'
	sudo iceprog $<

$(BUILD_DIR)/tb.out: $(SOURCE_V) $(TESTBENCH_V) | $(BUILD_DIR)
	iverilog $^ -o $@

sim: $(BUILD_DIR)/tb.out
	cd $(BUILD_DIR) && ./tb.out

clean:
	rm -rf $(BUILD_DIR)

.SECONDARY:
.PHONY: all prog clean sim