cpu/test/test.S

125 lines
2.3 KiB
ArmAsm

.global _start
.text
_start:
# NOTE: nop required because cpu currently does not detect when something is needed from a later stage of the pipeline.
# 4 clocks allows one instruction to finish before the next reads the regfile
# AUIPC
# JAL
# JALR
# XORI
# ORI
# SLLI
# SRLI
# SRAI
# SLTI
# SLTUI
# SLL
# SRL
# SRA
# SLT
# SLTU
# lui
lui x1, 0xfedcb # x1 = 0xfedcb000
nop
nop
nop
# addi
addi x1, x1, 0x789 # x1 = 0xfedcb789
addi x2, x0, -1 # x2 = 0xffffffff
nop
nop
addi x3, x1, -0x777 # x3 = 0xfedcb012
nop
nop
nop
# add
add x4, x1, x2 # x4 = 0xfedcb788
nop
nop
nop
# sub
sub x5, x1, x3 # x5 = 0x00000777
nop
nop
nop
# and
and x6, x1, x2 # x6 = 0xfedcb789
and x7, x1, x0 # x7 = 0x00000000
and x8, x4, x3 # x8 = 0xfedcb000
nop
nop
nop
# or
or x9, x1, x2 # x9 = 0xffffffff
or x10, x1, x0 # x10 = 0xfedcb789
or x11, x4, x3 # x11 = 0x0xfedcb79a
nop
nop
nop
# xor
xor x12, x1, x2 # x12 = 0x01234876
xor x13, x1, x1 # x13 = 0x00000000
xor x14, x0, x2 # x14 = 0xffffffff
nop
nop
nop
# andi
andi x15, x2, -1348 # x15 = 0xfffffabc -1348 = 0xfffffabc
andi x16, x2, 0x123 # x16 = 0x00000123
andi x17, x1, -1645 # x17 = 0xfedcb181 -1645 = 0xfffff993
nop
nop
nop
# ori
ori x18, x2, 0x000 # x18 = 0xffffffff
ori x19, x0, 0x768 # x19 = 0x768
ori x20, x1, 0x7ff # x20 = 0xfedcb7ff
nop
nop
nop
# # xori
# xori x12, x1, x2 # x12 = 0x01234876
# xori x13, x1, x1 # x13 = 0x00000000
# xori x14, x0, x2 # x14 = 0xffffffff
# nop
# nop
# nop
# counter and infinite loop
nop
nop
nop
addi x31, x0, 1 # x1 = 1
loop:
nop
nop
nop
addi x31, x31, 1 # increment x1
nop
nop
nop
j loop # loop forever
nop
nop
nop
nop
nop
nop
.data