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24 lines
430 B
Makefile
24 lines
430 B
Makefile
all: verify
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TESTBENCH_V = $(wildcard *_tb.sv)
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SOURCE_V = $(wildcard ../*.v ../*.sv)
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LOGS = $(TESTBENCH_V:.sv=.log)
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# Hardware compilation
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%.out: %.sv $(SOURCE_V)
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iverilog -g2012 -o $@ $< -y ../ -Y .sv -I ../
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# Run test
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%.vcd %.log: %.out
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./$< | tee $(patsubst %.out, %.log, $<)
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verify: $(LOGS)
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@! grep -q "ERROR" $^
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@grep -q "SUCCESS" $^
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clean:
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rm -rf *.vcd *.log *.out
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.SECONDARY: %.log %.vcd
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.PHONY: all clean verify
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