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brendanhaines
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cpu
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parallel_ata
cpu
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tests
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Brendan Haines
3b476cfc32
update gtkw paths
2022-12-28 22:10:18 -07:00
..
test_basic
remove reference to old axil bridge location
2022-12-01 01:14:01 -07:00
test_c
use systemverilog 2012 for simulation
2022-11-19 18:41:25 -07:00
.gitignore
rename testbench to tests
2021-09-09 00:58:28 -06:00
basic_test.gtkw
update gtkw paths
2022-12-28 22:10:18 -07:00
Makefile
rename testbench to tests
2021-09-09 00:58:28 -06:00