add ability to wait for memory writes

hdl/core.v

@@ -6,12 +6,14 @@ module core(
     output reg [31:0] mem_inst_addr,
     input [31:0] mem_inst_data,
 
-    // // Memory - data
+    // Memory - data
     output reg [31:0] mem_data_addr,
     input [31:0] mem_data_rdata,
     output reg [31:0] mem_data_wdata,
     output reg [(32/8)-1:0] mem_data_wmask,
     output reg mem_data_we,
+    input mem_data_rvalid,
+    input mem_data_wready,
 
     // output reg [31:0] mem_data_waddr,
     // output reg [31:0] mem_data_wdata,
@@ -400,11 +402,18 @@ always @(*) begin
     s_mem_stall = 0;    // TODO: add stall logic when actually reading/writing
     s_mem_bp = 0;
 
+
     mem_data_addr = r_mem_alu_out;
     mem_data_wdata = regfile[r_mem_rs2];
     mem_data_wmask = 4'b1111;   // TODO: implement smaller writes
     mem_data_we = r_mem_store && r_mem_valid;
+    if (r_mem_store) begin
+        s_mem_stall = ~mem_data_wready;
+    end
     s_mem_load_data = mem_data_rdata;   // TODO: implement smaller reads
+    if (r_mem_load) begin
+        s_mem_stall = ~mem_data_rvalid;
+    end
 end
 
 // WB