rename testbench to tests

2021-09-09 00:58:28 -06:00
parent b7cd786182
commit 2d69722cb1
15 changed files with 0 additions and 0 deletions
--- a/tests/test_c/tb.ld
+++ b/tests/test_c/tb.ld
@@ -0,0 +1,31 @@
+OUTPUT_ARCH( "riscv" )
+ENTRY(_start)
+
+MEMORY
+{
+    ROM (rx)    : ORIGIN = 0x00000000, LENGTH = 2k
+    RAM (rwx)   : ORIGIN = 0x00000800, LENGTH = 2k
+    /* FLASH (rx) : ORIGIN = 0x00200000, LENGTH = 512 */
+}
+
+SECTIONS
+{
+    .text :
+    {
+        /* . = ALIGN(4); */
+        _text = .;
+        *(.text*)
+        *(.rodata*)
+        _etext = .;
+        /* . = ALIGN(4); */
+    } > ROM
+
+    .data :
+    {
+        /* . = ALIGN(4); */
+        _data = .;
+        *(.data*)
+        _edata = .;
+        /* . = ALIGN(4); */
+    } > RAM /*AT> FLASH*/
+}