cpu/Makefile

BUILD_DIR = build
# SOURCE_V = $(wildcard hdl/*.v)
# TESTBENCH_V = $(wildcard hdl/tb/*.v)
SOURCE_V = hdl/core.v
TESTBENCH_V = hdl/tb/core_tb.v

all: sim

$(BUILD_DIR):
	mkdir -p $(BUILD_DIR)

$(BUILD_DIR)/tb.out: $(SOURCE_V) $(TESTBENCH_V) | $(BUILD_DIR)
	iverilog $^ -o $@

sim: $(BUILD_DIR)/tb.out
	cd $(BUILD_DIR) && ./tb.out

clean:
	rm -rf $(BUILD_DIR)

.SECONDARY:
.PHONY: all clean sim