cpu/hdl/Makefile

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Makefile
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# SOURCE_V = $(wildcard *.v)
# TESTBENCH_V = $(wildcard tb/*.v)
SOURCE_V = core.v
TESTBENCH_V = tb/core_tb.v
all: sim
tb.out: $(SOURCE_V) $(TESTBENCH_V)
iverilog $^ -o $@
sim: tb.out
./tb.out
clean:
rm -rf tb.out tb.vcd
.SECONDARY:
.PHONY: all clean sim