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successfully zipping automatically

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Brendan Haines 2021-06-29 02:33:05 -06:00
parent afd893fe48
commit e87997a287
1 changed files with 88 additions and 82 deletions
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18
scripting/plugins/OutputGeneration/FabOutputs.py
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@ -2,6 +2,7 @@ import pcbnew
import os import os
from datetime import datetime from datetime import datetime
from pathlib import Path from pathlib import Path
import zipfile
__all__ = ["FabOutputs"] __all__ = ["FabOutputs"]
@ -33,6 +34,7 @@ class FabOutputs(pcbnew.ActionPlugin):
rev = str.upper(pcb.GetTitleBlock().GetRevision()) rev = str.upper(pcb.GetTitleBlock().GetRevision())
suffix = "" suffix = ""
if rev != "":
suffix += f"_REV{rev}" suffix += f"_REV{rev}"
suffix += f"_{now.strftime('%Y%m%d_%H%M%S')}" suffix += f"_{now.strftime('%Y%m%d_%H%M%S')}"
@ -82,6 +84,7 @@ class FabOutputs(pcbnew.ActionPlugin):
"soldermask defined": None, # TODO: how do I want to determine this? "soldermask defined": None, # TODO: how do I want to determine this?
} }
with zipfile.ZipFile(dir_fab / f"{project_name}{suffix}.zip", "w") as z:
# ================ # ================
# Gerbers # Gerbers
@ -134,6 +137,7 @@ class FabOutputs(pcbnew.ActionPlugin):
plot_controller.PlotLayer() plot_controller.PlotLayer()
os.rename(dir_fab / f"{project_name}.gbr", dir_fab / f"{project_name}{suffix}.{layer_info[1]}") os.rename(dir_fab / f"{project_name}.gbr", dir_fab / f"{project_name}{suffix}.{layer_info[1]}")
z.write(dir_fab / f"{project_name}{suffix}.{layer_info[1]}", arcname=f"{project_name}{suffix}.{layer_info[1]}")
plot_controller.ClosePlot() plot_controller.ClosePlot()
@ -159,12 +163,7 @@ class FabOutputs(pcbnew.ActionPlugin):
drill_writer.CreateDrillandMapFilesSet(str(dir_fab), DRILL_FILE, MAP_FILE, REPORTER) drill_writer.CreateDrillandMapFilesSet(str(dir_fab), DRILL_FILE, MAP_FILE, REPORTER)
os.rename(dir_fab / f"{project_name}.drl", dir_fab / f"{project_name}{suffix}.drl") os.rename(dir_fab / f"{project_name}.drl", dir_fab / f"{project_name}{suffix}.drl")
z.write(dir_fab / f"{project_name}{suffix}.drl", arcname=f"{project_name}{suffix}.drl")
# ================
# Pick and Place
# ================
# TODO
# ================ # ================
# Fab Drawing # Fab Drawing
@ -175,6 +174,13 @@ class FabOutputs(pcbnew.ActionPlugin):
f.write(f"Layer Order\n") f.write(f"Layer Order\n")
# for layer in plot_plan: # for layer in plot_plan:
z.write(dir_fab / f"README_FABRICATION{suffix}.TXT", arcname=f"README_FABRICATION{suffix}.TXT")
# ================
# Pick and Place
# ================s
# TODO
# ================ # ================
# Assembly Drawing # Assembly Drawing