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link logo to schematic symbol so it doesn't get deleted

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This commit is contained in:
Brendan Haines
2023-03-17 23:46:11 -06:00
parent b911ed7ea9
commit d3f739bb7f
3 changed files with 561 additions and 17 deletions
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22
templates/jlcpcb_template/jlcpcb_template.kicad_pcb
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@@ -4,7 +4,7 @@
(thickness 1.6)
)
(paper "A4")
(paper "A")
(title_block
(title "${PROJECT_NAME}")
(rev "${PCB_REVISION}")
@@ -110,7 +110,7 @@
(tstamp 0ed882a0-e4ce-4f18-bef6-9c3cccbc2678)
(at 123.19 123.19)
(descr "Mounting Hole, #4")
(property "Sheetfile" "test_proj.kicad_sch")
(property "Sheetfile" "jlcpcb_template.kicad_sch")
(property "Sheetname" "")
(property "ki_description" "Hole")
(path "/79801d06-18e7-498c-8d4e-cc6cc5060c9d")
@@ -133,12 +133,16 @@
(footprint "common:LOGO_BH" (layer "F.Cu")
(tstamp 2c2034ad-58b7-4a90-9915-abf69702fa36)
(at 99.06 116.84)
(property "Sheetfile" "jlcpcb_template.kicad_sch")
(property "Sheetname" "")
(property "exclude_from_bom" "")
(path "/34f9aa7c-9331-4a4e-ada5-723181f4dcaa")
(attr smd exclude_from_pos_files exclude_from_bom allow_missing_courtyard)
(fp_text reference "REF**" (at 0 -0.3175 unlocked) (layer "F.SilkS") hide
(fp_text reference "LOGO1" (at 0 -0.3175 unlocked) (layer "F.SilkS") hide
(effects (font (size 0.635 0.635) (thickness 0.127)))
(tstamp a9243f51-eda4-4f1b-a757-cd7225d8ae98)
)
(fp_text value "LOGO_BH" (at 0 0.635 unlocked) (layer "F.Fab") hide
(fp_text value "~" (at 0 0.635 unlocked) (layer "F.Fab") hide
(effects (font (size 0.635 0.635) (thickness 0.127)))
(tstamp 8e493312-c025-4c71-8e0c-010a596ed2b6)
)
@@ -357,7 +361,7 @@
(tstamp 9cf13263-b30a-43c4-9c5f-ce1ec46a078d)
(at 123.19 80.01)
(descr "Mounting Hole, #4")
(property "Sheetfile" "test_proj.kicad_sch")
(property "Sheetfile" "jlcpcb_template.kicad_sch")
(property "Sheetname" "")
(property "ki_description" "Hole")
(path "/f50864ff-d371-4215-9314-242c46489f70")
@@ -381,7 +385,7 @@
(tstamp c0724124-56f1-4f5b-a04e-718e5095e569)
(at 80.01 123.19)
(descr "Mounting Hole, #4")
(property "Sheetfile" "test_proj.kicad_sch")
(property "Sheetfile" "jlcpcb_template.kicad_sch")
(property "Sheetname" "")
(property "ki_description" "Hole")
(path "/409ab3ca-8890-41e5-8523-0edcaaeb13ca")
@@ -405,7 +409,7 @@
(tstamp e6a1835e-7425-4888-a7a8-6177237b4709)
(at 80.01 80.01)
(descr "Mounting Hole, #4")
(property "Sheetfile" "test_proj.kicad_sch")
(property "Sheetfile" "jlcpcb_template.kicad_sch")
(property "Sheetname" "")
(property "ki_description" "Hole")
(path "/94346919-81db-46a4-8218-cd482107d9cb")
@@ -453,7 +457,7 @@
(dimension (type aligned) (layer "F.Fab") (tstamp 01ee0b31-f02b-4470-b2f7-07b9d1207f38)
(pts (xy 76.2 76.2) (xy 127 76.2))
(height -5.08)
(gr_text "2000.0000 mils" (at 101.6 69.977) (layer "F.Fab") (tstamp bcdb646c-762d-4bd2-86a0-8c754ad0dbf4)
(gr_text "2000.0000 mils" (at 101.6 69.977) (layer "F.Fab") (tstamp 01ee0b31-f02b-4470-b2f7-07b9d1207f38)
(effects (font (size 1.016 1.016) (thickness 0.127)))
)
(format (prefix "") (suffix "") (units 3) (units_format 1) (precision 4))
@@ -462,7 +466,7 @@
(dimension (type aligned) (layer "F.Fab") (tstamp 0517aec2-45e6-4cc3-9803-feed6af5a135)
(pts (xy 76.2 76.2) (xy 76.2 127))
(height 5.08)
(gr_text "2000.0000 mils" (at 69.977 101.6 90) (layer "F.Fab") (tstamp 4760d9a9-96dd-4fd9-87c5-327653770131)
(gr_text "2000.0000 mils" (at 69.977 101.6 90) (layer "F.Fab") (tstamp 0517aec2-45e6-4cc3-9803-feed6af5a135)
(effects (font (size 1.016 1.016) (thickness 0.127)))
)
(format (prefix "") (suffix "") (units 3) (units_format 1) (precision 4))