From b89c70650bd73753ce25fe083efd11a20f6a11e6 Mon Sep 17 00:00:00 2001 From: Brendan Haines Date: Fri, 17 Mar 2023 22:57:30 -0600 Subject: [PATCH] first pass at a template project --- templates/.gitignore | 1 + templates/jlcpcb_template/.gitignore | 2 + templates/jlcpcb_template/fp-lib-table | 7 + .../jlcpcb_template/jlcpcb_template.kicad_dru | 7 + .../jlcpcb_template/jlcpcb_template.kicad_pcb | 472 ++++++++++++++++ .../jlcpcb_template/jlcpcb_template.kicad_prl | 77 +++ .../jlcpcb_template/jlcpcb_template.kicad_pro | 503 ++++++++++++++++++ .../jlcpcb_template/jlcpcb_template.kicad_sch | 313 +++++++++++ templates/jlcpcb_template/sym-lib-table | 4 + 9 files changed, 1386 insertions(+) create mode 100644 templates/.gitignore create mode 100644 templates/jlcpcb_template/.gitignore create mode 100644 templates/jlcpcb_template/fp-lib-table create mode 100644 templates/jlcpcb_template/jlcpcb_template.kicad_dru create mode 100644 templates/jlcpcb_template/jlcpcb_template.kicad_pcb create mode 100644 templates/jlcpcb_template/jlcpcb_template.kicad_prl create mode 100644 templates/jlcpcb_template/jlcpcb_template.kicad_pro create mode 100644 templates/jlcpcb_template/jlcpcb_template.kicad_sch create mode 100644 templates/jlcpcb_template/sym-lib-table diff --git a/templates/.gitignore b/templates/.gitignore new file mode 100644 index 0000000..0374790 --- /dev/null +++ b/templates/.gitignore @@ -0,0 +1 @@ +**/*-cache \ No newline at end of file diff --git a/templates/jlcpcb_template/.gitignore b/templates/jlcpcb_template/.gitignore new file mode 100644 index 0000000..3299a6b --- /dev/null +++ b/templates/jlcpcb_template/.gitignore @@ -0,0 +1,2 @@ +*-backups +*.bak \ No newline at end of file diff --git a/templates/jlcpcb_template/fp-lib-table b/templates/jlcpcb_template/fp-lib-table new file mode 100644 index 0000000..a4ca199 --- /dev/null +++ b/templates/jlcpcb_template/fp-lib-table @@ -0,0 +1,7 @@ +(fp_lib_table + (version 7) + (lib (name "common")(type "KiCad")(uri "${KIPRJMOD}/../common_libraries/common.pretty")(options "")(descr "")) + (lib (name "jst")(type "KiCad")(uri "${KIPRJMOD}/../common_libraries/jst.pretty")(options "")(descr "")) + (lib (name "molex")(type "KiCad")(uri "${KIPRJMOD}/../common_libraries/molex.pretty")(options "")(descr "")) + (lib (name "samtec")(type "KiCad")(uri "${KIPRJMOD}/../common_libraries/samtec.pretty")(options "")(descr "")) +) diff --git a/templates/jlcpcb_template/jlcpcb_template.kicad_dru b/templates/jlcpcb_template/jlcpcb_template.kicad_dru new file mode 100644 index 0000000..275ecf3 --- /dev/null +++ b/templates/jlcpcb_template/jlcpcb_template.kicad_dru @@ -0,0 +1,7 @@ +(version 1) + +(rule IgnoreSilkScreenGraphicOverlap + (condition "A.Type == 'Graphic' && B.Type == 'Graphic'") + (constraint silk_clearance) + (severity ignore) +) diff --git a/templates/jlcpcb_template/jlcpcb_template.kicad_pcb b/templates/jlcpcb_template/jlcpcb_template.kicad_pcb new file mode 100644 index 0000000..fe74eaa --- /dev/null +++ b/templates/jlcpcb_template/jlcpcb_template.kicad_pcb @@ -0,0 +1,472 @@ +(kicad_pcb (version 20221018) (generator pcbnew) + + (general + (thickness 1.6) + ) + + (paper "A4") + (title_block + (title "${PROJECT_NAME}") + (rev "${PCB_REVISION}") + (company "BRENDANHAINES.COM") + ) + + (layers + (0 "F.Cu" signal) + (1 "In1.Cu" signal) + (2 "In2.Cu" signal) + (31 "B.Cu" signal) + (32 "B.Adhes" user "B.Adhesive") + (33 "F.Adhes" user "F.Adhesive") + (34 "B.Paste" user) + (35 "F.Paste" user) + (36 "B.SilkS" user "B.Silkscreen") + (37 "F.SilkS" user "F.Silkscreen") + (38 "B.Mask" user) + (39 "F.Mask" user) + (40 "Dwgs.User" user "User.Drawings") + (41 "Cmts.User" user "User.Comments") + (42 "Eco1.User" user "User.Eco1") + (43 "Eco2.User" user "User.Eco2") + (44 "Edge.Cuts" user) + (45 "Margin" user) + (46 "B.CrtYd" user "B.Courtyard") + (47 "F.CrtYd" user "F.Courtyard") + (48 "B.Fab" user) + (49 "F.Fab" user) + (50 "User.1" user) + (51 "User.2" user) + (52 "User.3" user) + (53 "User.4" user) + (54 "User.5" user) + (55 "User.6" user) + (56 "User.7" user) + (57 "User.8" user) + (58 "User.9" user) + ) + + (setup + (stackup + (layer "F.SilkS" (type "Top Silk Screen") (color "White")) + (layer "F.Paste" (type "Top Solder Paste")) + (layer "F.Mask" (type "Top Solder Mask") (color "Green") (thickness 0.01)) + (layer "F.Cu" (type "copper") (thickness 0.035)) + (layer "dielectric 1" (type "core") (thickness 0.48) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02)) + (layer "In1.Cu" (type "copper") (thickness 0.035)) + (layer "dielectric 2" (type "prepreg") (thickness 0.48) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02)) + (layer "In2.Cu" (type "copper") (thickness 0.035)) + (layer "dielectric 3" (type "core") (thickness 0.48) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02)) + (layer "B.Cu" (type "copper") (thickness 0.035)) + (layer "B.Mask" (type "Bottom Solder Mask") (color "Green") (thickness 0.01)) + (layer "B.Paste" (type "Bottom Solder Paste")) + (layer "B.SilkS" (type "Bottom Silk Screen") (color "White")) + (copper_finish "ENIG") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (pcbplotparams + (layerselection 0x00010fc_ffffffff) + (plot_on_all_layers_selection 0x0000000_00000000) + (disableapertmacros false) + (usegerberextensions false) + (usegerberattributes true) + (usegerberadvancedattributes true) + (creategerberjobfile true) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (dxfpolygonmode true) + (dxfimperialunits true) + (dxfusepcbnewfont true) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue true) + (plotinvisibletext false) + (sketchpadsonfab false) + (subtractmaskfromsilk false) + (outputformat 1) + (mirror false) + (drillshape 1) + (scaleselection 1) + (outputdirectory "") + ) + ) + + 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(property "Value" "Mounting_Hole" (at 38.1 182.88 0) + (effects (font (size 1.27 1.27)) hide) + ) + (property "Footprint" "common:MH120X230_#4" (at 43.18 190.5 0) + (effects (font (size 1.27 1.27)) hide) + ) + (property "Datasheet" "" (at 43.18 190.5 0) + (effects (font (size 1.27 1.27)) hide) + ) + (pin "1" (uuid 9dd8d1f8-25ce-4da4-aed2-54d45a5a6ed9)) + (instances + (project "test_proj" + (path "/5c9b5493-28d5-442a-a1c0-43be0cca0b1b" + (reference "MH2") (unit 1) + ) + ) + ) + ) + + (sheet_instances + (path "/" (page "1")) + ) +) diff --git a/templates/jlcpcb_template/sym-lib-table b/templates/jlcpcb_template/sym-lib-table new file mode 100644 index 0000000..81ab05c --- /dev/null +++ b/templates/jlcpcb_template/sym-lib-table @@ -0,0 +1,4 @@ +(sym_lib_table + (version 7) + (lib (name "bh")(type "KiCad")(uri "/home/brendan/Documents/projects/bhht/common_libraries/bh.kicad_sym")(options "")(descr "")) +)