more elegant zip process

This commit is contained in:
Brendan Haines 2021-06-29 02:43:41 -06:00
parent e87997a287
commit ae9b58de22

View File

@ -84,7 +84,8 @@ class FabOutputs(pcbnew.ActionPlugin):
"soldermask defined": None, # TODO: how do I want to determine this?
}
with zipfile.ZipFile(dir_fab / f"{project_name}{suffix}.zip", "w") as z:
files_fab = []
files_asy = []
# ================
# Gerbers
@ -136,8 +137,9 @@ class FabOutputs(pcbnew.ActionPlugin):
plot_controller.OpenPlotfile('', pcbnew.PLOT_FORMAT_GERBER, layer_info[2])
plot_controller.PlotLayer()
os.rename(dir_fab / f"{project_name}.gbr", dir_fab / f"{project_name}{suffix}.{layer_info[1]}")
z.write(dir_fab / f"{project_name}{suffix}.{layer_info[1]}", arcname=f"{project_name}{suffix}.{layer_info[1]}")
fname = f"{project_name}{suffix}.{layer_info[1]}"
os.rename(dir_fab / f"{project_name}.gbr", dir_fab / fname)
files_fab.append(fname)
plot_controller.ClosePlot()
@ -162,19 +164,9 @@ class FabOutputs(pcbnew.ActionPlugin):
drill_writer.SetOptions(MIRROR_Y_AXIS, HEADER, OFFSET, MERGE_PTH_NPTH)
drill_writer.CreateDrillandMapFilesSet(str(dir_fab), DRILL_FILE, MAP_FILE, REPORTER)
os.rename(dir_fab / f"{project_name}.drl", dir_fab / f"{project_name}{suffix}.drl")
z.write(dir_fab / f"{project_name}{suffix}.drl", arcname=f"{project_name}{suffix}.drl")
# ================
# Fab Drawing
# ================
with open(dir_fab / f"README_FABRICATION{suffix}.TXT", "w") as f:
f.write(f"{project_name}-REV{rev}\n")
f.write(f"Layer Order\n")
# for layer in plot_plan:
z.write(dir_fab / f"README_FABRICATION{suffix}.TXT", arcname=f"README_FABRICATION{suffix}.TXT")
fname = f"{project_name}{suffix}.drl"
os.rename(dir_fab / f"{project_name}.drl", dir_fab / fname)
files_fab.append(fname)
# ================
# Pick and Place
@ -182,6 +174,18 @@ class FabOutputs(pcbnew.ActionPlugin):
# TODO
# ================
# Fab Drawing
# ================
fname = f"README_FABRICATION{suffix}.TXT"
with open(dir_fab / fname, "w") as f:
f.write(f"{project_name}-REV{rev}\n")
f.write(f"Layer Order\n")
# for layer in plot_plan:
files_fab.append(fname)
# ================
# Assembly Drawing
# ================
@ -190,3 +194,26 @@ class FabOutputs(pcbnew.ActionPlugin):
f.write(f"{project_name}-REV{rev}\n")
f.write(f"Layer Order\n")
# for layer in plot_plan:
# ================
# Zip
# ================
with zipfile.ZipFile(dir_fab / f"{project_name}{suffix}_fabrication.zip", "w") as z:
for fname in files_fab:
z.write(dir_fab / fname, arcname=fname)
with zipfile.ZipFile(dir_asy / f"{project_name}{suffix}_assembly.zip", "w") as z:
for fname in files_fab:
z.write(dir_fab / fname, arcname=Path("fabrication") / fname)
for fname in files_asy:
z.write(dir_asy / fname, arcname=fname)
# dir_archive = dir_pcb / "Archive"
# with zipfile.ZipFile(dir_archive / f"{project_name}{suffix}_archive.zip", "w") as z:
# for fname in files_fab:
# z.write(dir_fab / fname, arcname=Path("fabrication") / fname)
# for fname in files_asy:
# z.write(dir_asy / fname, arcname=Path("assembly") / fname)
# # TODO: archive project here