diff --git a/spice/ti/TLV70012_PSPICE_TRANS/TLV70012-PSpiceFiles/SCHEMATIC1/trans.sim b/spice/ti/TLV70012_PSPICE_TRANS/TLV70012-PSpiceFiles/SCHEMATIC1/trans.sim
new file mode 100644
index 0000000..ae75422
--- /dev/null
+++ b/spice/ti/TLV70012_PSPICE_TRANS/TLV70012-PSpiceFiles/SCHEMATIC1/trans.sim
@@ -0,0 +1,137 @@
+@OrCAD Simulation Server Version: 1.0
+
+@Settings: 0 1
+@General:
+ProfileName= "trans" 
+ProfileFile= "trans.sim" 
+Connectivity= "SCHEMATIC1.net" 
+NetlistFile= "trans.cir" 
+DataFile= "trans.dat" 
+OutFile= "trans.out" 
+Notes=
+@#$BEGINNOTES
+@#$ENDNOTES
+@End General
+@Analysis: 0 1
++0 0 0 0 
++0 "1m" 
++1 "" 
++2 "0" 
++3 "" 
++4 "" 
++5 "" 
++6 "" 
+@End Analysis
+@Analysis: 1 0
++2 0 0
++0 "" 
++1 "" 
++2 "" 
++3 "" 
++4 "" 
++5 "" 
+@End Analysis
+@Analysis: 2 0
++0 0
++0 "" 
++1 "" 
++2 "" 
++3 "" 
++4 "" 
++5 "" 
++6 "" 
++7 "" 
+@End Analysis
+@Analysis: 3 0
++0 0 0
++0 "" 
++1 "" 
++2 "" 
+@End Analysis
+@Analysis: 4 0
++0 0 1 0 0 0 0 0 0 0
++0 "" 
++1 "" 
++2 "" 
++3 "" 
++4 "" 
++5 "" 
++6 "" 
++7 "" 
+LoadFile 0 "" 
+SaveFile 0 "" 
+@End Analysis
+@Analysis: 5 0
++0 0
++0 "" 
++1 "" 
++2 "" 
++3 "" 
++4 "" 
++5 "" 
++6 "" 
++7 "" 
+@End Analysis
+@Analysis: 6 0
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+@End Analysis
+@Analysis: 7 0
++0 0
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+@End Analysis
+@Analysis: 8 0
++0 
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+@End Analysis
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+@End Analysis
+@Analysis: 11 1
++ 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++ 0 0 0 0 0 0 0 0 0
+@End Analysis
+@Analysis: 12 0
++2236960 0
+@End Analysis
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++0 1 1 1
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+@Analysis: 14 1
++1 1 1 "*" 
+@End Analysis
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+@End Analysis
+@Analysis: 16 0
++0 "0" 
++1 "0" 
++2 "chkpt_default, , ," 
+@End Analysis
+@Analysis: 17 0
++0 "-1" 
++1 "" 
++2 "-1" 
++3 "-1" 
++4 "1" 
+@End Analysis
diff --git a/spice/ti/TLV70012_PSPICE_TRANS/TLV70012-PSpiceFiles/SCHEMATIC1/trans/trans.mrk b/spice/ti/TLV70012_PSPICE_TRANS/TLV70012-PSpiceFiles/SCHEMATIC1/trans/trans.mrk
new file mode 100644
index 0000000..2056ad5
Binary files /dev/null and b/spice/ti/TLV70012_PSPICE_TRANS/TLV70012-PSpiceFiles/SCHEMATIC1/trans/trans.mrk differ
diff --git a/spice/ti/TLV70012_PSPICE_TRANS/TLV70012-PSpiceFiles/SCHEMATIC1/trans/trans.prb b/spice/ti/TLV70012_PSPICE_TRANS/TLV70012-PSpiceFiles/SCHEMATIC1/trans/trans.prb
new file mode 100644
index 0000000..751ff76
--- /dev/null
+++ b/spice/ti/TLV70012_PSPICE_TRANS/TLV70012-PSpiceFiles/SCHEMATIC1/trans/trans.prb
@@ -0,0 +1,76 @@
+[DISPLAYS]
+BEGIN DISPLAY LAST SESSION
+ANALYSIS TRANSIENT_ANALYSIS
+SYMBOL ALWAYS
+TRACECOLORSCHEME NORMAL
+BEGIN ANAPLOT 1
+XBASE
+BEGIN XAXIS
+XAXISUSERNAME 0 (null)
+RANGEFLAG AUTO
+TYPE LINEAR
+UNIT s
+BEGIN GRIDS
+AUTOMATIC
+MAJORNUMBERS
+MAJORSTYLE LINES
+MAJORPATTERN SOLID
+MINORSTYLE LINES
+MINORPATTERN DOT
+END GRIDS
+END XAXIS
+BEGIN YAXIS 1
+YAXISSIDE LEFT
+ACTIVE
+RANGEFLAG AUTO
+TYPE LINEAR
+UNIT V
+BEGIN GRIDS
+AUTOMATIC
+MAJORNUMBERS
+MAJORSTYLE LINES
+MAJORPATTERN SOLID
+MINORSTYLE LINES
+MINORPATTERN DOT
+END GRIDS
+BEGIN TRACE V(Vout)
+MARKERID 1
+END TRACE V(Vout)
+END YAXIS 1
+END ANAPLOT 1
+BEGIN ANAPLOT 2
+ACTIVE
+BEGIN XAXIS
+XAXISUSERNAME 0 (null)
+RANGEFLAG AUTO
+TYPE LINEAR
+UNIT s
+BEGIN GRIDS
+AUTOMATIC
+MAJORNUMBERS
+MAJORSTYLE LINES
+MAJORPATTERN SOLID
+MINORSTYLE LINES
+MINORPATTERN DOT
+END GRIDS
+END XAXIS
+BEGIN YAXIS 1
+YAXISSIDE LEFT
+ACTIVE
+RANGEFLAG AUTO
+TYPE LINEAR
+UNIT V
+BEGIN GRIDS
+AUTOMATIC
+MAJORNUMBERS
+MAJORSTYLE LINES
+MAJORPATTERN SOLID
+MINORSTYLE LINES
+MINORPATTERN DOT
+END GRIDS
+BEGIN TRACE V(Vin)
+MARKERID 2
+END TRACE V(Vin)
+END YAXIS 1
+END ANAPLOT 2
+END DISPLAY LAST SESSION
diff --git a/spice/ti/TLV70012_PSPICE_TRANS/TLV70012.DSN b/spice/ti/TLV70012_PSPICE_TRANS/TLV70012.DSN
new file mode 100644
index 0000000..eec5ac5
Binary files /dev/null and b/spice/ti/TLV70012_PSPICE_TRANS/TLV70012.DSN differ
diff --git a/spice/ti/TLV70012_PSPICE_TRANS/TLV70012.OLB b/spice/ti/TLV70012_PSPICE_TRANS/TLV70012.OLB
new file mode 100644
index 0000000..aa2722a
Binary files /dev/null and b/spice/ti/TLV70012_PSPICE_TRANS/TLV70012.OLB differ
diff --git a/spice/ti/TLV70012_PSPICE_TRANS/TLV70012.lib b/spice/ti/TLV70012_PSPICE_TRANS/TLV70012.lib
new file mode 100644
index 0000000..7449f19
--- /dev/null
+++ b/spice/ti/TLV70012_PSPICE_TRANS/TLV70012.lib
@@ -0,0 +1,70 @@
+**$ENCRYPTED_LIB
+**$INTERFACE
+* TLV70012 Model
+***************************************************************************
+** This product is designed as an aid for customers of Texas Instruments.**
+** No warranties, either expressed or implied, with respect to this third**
+** party software (if any) or with respect to its fitness for any        **
+** particular purpose is claimed by Texas Instruments or the author. The **
+** software (if any) is provided soley on an "as is" basis. The entire   **
+** risk as to its quality and performance is with the customer           **
+********************************************************************************
+* 
+* (C) Copyright 2011 Texas Instruments Incorporated  . All rights reserved.
+*
+* Released by: Analog e-Lab Design Center, Texas Instruments Inc.
+* Part: TLV70012
+* Date: 04/05/2011
+* Model Type: TRANSIENT
+* Simulator: PSPICE
+* EVM Order Number: 
+* EVM Users Guide: 
+* Datasheet: SLVSA00B - SEPTEMBER 2009 - REVISED DECEMBER 2010
+*
+*****************************************************************************
+*
+* Updates:
+*
+* Final 1.00
+* Release to Web.
+*
+*********************************************************************************
+* source TLV70012
+*$
+.SUBCKT TLV70012 IN GND EN OUT
+$CDNENCSTART
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+$CDNENCFINISH
+.ENDS TLV70012
+*$
+.subckt SCHEMATIC1_TLV70012_F1 1 2 3 4  
+$CDNENCSTART
+eee8c5c7a2bc4b01f045f303678664e7916da0bae22e8cb0bba041dd67c69ce448ea70148a9ac1670c8926c1ac5057c8ccfcd77bf87ca9dce2e9103f51d0de79
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+$CDNENCFINISH
+.ends SCHEMATIC1_TLV70012_F1
+*$
+
diff --git a/spice/ti/TLV70012_PSPICE_TRANS/TLV70012.opj b/spice/ti/TLV70012_PSPICE_TRANS/TLV70012.opj
new file mode 100644
index 0000000..0b49870
--- /dev/null
+++ b/spice/ti/TLV70012_PSPICE_TRANS/TLV70012.opj
@@ -0,0 +1,49 @@
+(ExpressProject "TLV70012"
+  (ProjectVersion "19981106")
+  (ProjectType "Analog or A/D Mixed Mode")
+  (Folder "Design Resources"
+    (Folder "Library")
+    (NoModify)
+    (File ".\tlv70012.dsn"
+      (Type "Schematic Design"))
+    (BuildFileAddedOrDeleted "x")
+    (CompileFileAddedOrDeleted "x")
+    (PSPICE_Regenerate_Netlist_Flag "FALSE"))
+  (Folder "Outputs"
+    (File ".\tlv70012-pspicefiles\schematic1\schematic1.net"
+      (Type "Report")))
+  (Folder "PSpice Resources"
+    (Folder "Simulation Profiles"
+      (ActiveProfile ".\tlv70012-pspicefiles\schematic1\trans.sim")
+      (File.PSpice.{09528990-3187-11D2-BC7B-00A0C90CBF91}
+         ".\tlv70012-pspicefiles\schematic1\trans.sim"
+        (DisplayName "SCHEMATIC1-trans")
+        (Type "PSpice Profile")))
+    (Folder "Model Libraries"
+      (Sort User)
+      (File ".\tlv70012.lib"
+        (Type "PSpiceLibrary")
+        (DisplayName ".\tlv70012.lib")))
+    (Folder "Stimulus Files"
+      (Sort User))
+    (Folder "Include Files"
+      (Sort User)))
+  (DefaultLibraryBrowseDirectory "library\PSpice")
+  (PartMRUSelector
+    (TLV70012
+      (FullPartName "TLV70012.Normal")
+      (LibraryName
+         "C:\ELAB_MODEL_WS\ELAB_MODEL_DS\PART_NUMBERS\TLV70012\RELEASE_TI\PSPICE\TLV70012_PSPICE_TRANS\TLV70012.OLB")
+      (DeviceIndex "0")))
+  (LastUsedLibraryBrowseDirectory
+     "C:\ELAB_MODEL_WS\ELAB_MODEL_DS\Part_Numbers\TLV70012\Release_TI\PSPICE\TLV70012_PSPICE_TRANS")
+  (GlobalState
+    (FileView
+      (Path "Design Resources")
+      (Path "Outputs"))
+    (HierarchyView)
+    (Doc
+      (Type "COrCapturePMDoc")
+      (Frame
+        (Placement "44 0 1 -1 -1 -1 -1 0 200 0 367"))
+      (Tab 0))))
diff --git a/spice/ti/slvm171.zip b/spice/ti/slvm171.zip
deleted file mode 100644
index aef7ac8..0000000
Binary files a/spice/ti/slvm171.zip and /dev/null differ