diff --git a/hdl/core.v b/hdl/core.v
index 1f31484..da8c6a9 100644
--- a/hdl/core.v
+++ b/hdl/core.v
@@ -546,7 +546,7 @@ always @(posedge clk) begin: pipeline_update
             // TODO: should I write if s_wb_stall=1?
             if (r_wb_rd != 0 && s_wb_write && r_wb_valid) begin
                 regfile[r_wb_rd] <= s_wb_data;
-                $display("%0t:\tPC=0x%h\tx%02d=0x%h", $time, r_id_pc, r_wb_rd, s_wb_data);
+                // $display("%0t:\tPC=0x%h\tx%02d=0x%h", $time, r_id_pc, r_wb_rd, s_wb_data);
             end
     end
 end