From 8decf524437ec62460b1b6094c11efd92c952dc7 Mon Sep 17 00:00:00 2001 From: Brendan Haines Date: Sat, 3 Jul 2021 21:17:42 -0600 Subject: [PATCH] make mem_data_rvalid a reg in tb --- hdl/tb/core_tb.v | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hdl/tb/core_tb.v b/hdl/tb/core_tb.v index 233de23..8831b91 100644 --- a/hdl/tb/core_tb.v +++ b/hdl/tb/core_tb.v @@ -48,9 +48,10 @@ wire [31:0] mem_data_wdata; wire [3:0] mem_data_wmask; wire mem_data_we; reg mem_data_wready; -wire mem_data_rvalid = 1'b1; +reg mem_data_rvalid; -always @(*) begin +always @(mem_data_addr) begin + mem_data_rvalid = 1'b1; if (mem_data_addr < MEM_LENGTH - 3) begin mem_data_rdata[ 7: 0] = mem[mem_data_addr+0]; if (mem_data_addr[0] == 0) begin