diff --git a/hdl/tb/core_tb.v b/hdl/tb/core_tb.v
index bbf733e..ad23093 100644
--- a/hdl/tb/core_tb.v
+++ b/hdl/tb/core_tb.v
@@ -9,6 +9,8 @@ wire dummy_out;
localparam MEM_INST_LENGTH = 256; // words
localparam MEM_DATA_LENGTH = 256; // words
+localparam MEM_DATA_BASE = 32'h00100000;
+
localparam INST_NOP = 32'h00000013; // nop
localparam DATA_DEFAULT = 32'h00000000;
localparam DATA_INVALID = 32'hdeadbeef;
@@ -140,10 +142,17 @@ core dut(
// .WB_RREADY()
// );
-wire [31:0] mem_data_idx = mem_data_addr >> 2;
-always @(posedge clk) begin
+wire [31:0] mem_data_idx = (mem_data_addr - MEM_DATA_BASE) >> 2;
+always @(*) begin
if (mem_data_idx < MEM_DATA_LENGTH) begin
mem_data_rdata = mem_data[mem_data_idx];
+ end else begin
+ mem_data_rdata = DATA_INVALID;
+ end
+end
+
+always @(posedge clk) begin
+ if (mem_data_idx < MEM_DATA_LENGTH) begin
if (mem_data_we) begin
if (mem_data_wmask[0]) begin
mem_data[mem_data_idx][7:0] <= mem_data_wdata[7:0];
@@ -159,7 +168,6 @@ always @(posedge clk) begin
end
end
end else begin
- mem_data_rdata = DATA_INVALID;
// ignore illegal writes
end
end
diff --git a/sim/core_tb.wcfg b/sim/core_tb.wcfg
index eff36d7..2563345 100644
--- a/sim/core_tb.wcfg
+++ b/sim/core_tb.wcfg
@@ -10,7 +10,7 @@
-
+
clk
clk
@@ -24,6 +24,30 @@
mem_data[0:255,31:0]
HEXRADIX
+
+ mem_data_addr[31:0]
+ mem_data_addr[31:0]
+ HEXRADIX
+
+
+ mem_data_idx[31:0]
+ mem_data_idx[31:0]
+ HEXRADIX
+
+
+ mem_data_rdata[31:0]
+ mem_data_rdata[31:0]
+ HEXRADIX
+
+
+ mem_data_wdata[31:0]
+ mem_data_wdata[31:0]
+ HEXRADIX
+
+
+ mem_data_we
+ mem_data_we
+
regfile[0:31,31:0]
regfile[0:31,31:0]