diff --git a/hdl/tb/core_tb.v b/hdl/tb/core_tb.v
index 07e0ea2..46163f6 100644
--- a/hdl/tb/core_tb.v
+++ b/hdl/tb/core_tb.v
@@ -25,36 +25,23 @@ localparam  DATA_INVALID    = 32'hdeadbeef;
 
 reg clk, reset;
 
-// Instruction memory
+// Memory
 reg [31:0] mem [0:MEM_LENGTH-1];
+initial $readmemh("text.hex", mem);
+
+// Instruction Memory
 wire [31:0] mem_inst_addr;
 wire [31:0] mem_inst_idx = mem_inst_addr >> 2;
 wire [31:0] mem_inst_data = mem_inst_idx < MEM_LENGTH ? mem[mem_inst_idx] : INST_NOP;
 
-initial begin: mem_init
-    // integer i;
-    // for (i=0; i<MEM_LENGTH; i=i+1) begin
-    //     mem[i] = INST_NOP;
-    // end
-    $readmemh("text.hex", mem);
-end
-
 // Data memory
-// reg [31:0] mem_data [0:MEM_DATA_LENGTH-1];
 wire [31:0] mem_data_addr;
-reg [31:0] mem_data_rdata;
+wire [31:0] mem_data_idx = (mem_data_addr) >> 2;
+wire [31:0] mem_data_rdata = mem_data_idx < MEM_LENGTH ? mem[mem_data_idx] : DATA_INVALID;
 wire [31:0] mem_data_wdata;
 wire [3:0] mem_data_wmask;
 wire mem_data_we;
 
-// initial begin: mem_data_init
-//     integer i;
-//     for (i=0; i<MEM_DATA_LENGTH; i=i+1) begin
-//         mem_data[i] = DATA_DEFAULT;
-//     end
-//     $readmemh("data.hex", mem_data);
-// end
-
 initial begin
     #0
     clk = 0;
@@ -150,15 +137,6 @@ core dut(
 //     .WB_RREADY()
 // );
 
-wire [31:0] mem_data_idx = (mem_data_addr) >> 2;
-always @(*) begin
-    if (mem_data_idx < MEM_LENGTH) begin
-        mem_data_rdata = mem[mem_data_idx];
-    end else begin
-        mem_data_rdata = DATA_INVALID;
-    end
-end
-
 always @(posedge clk) begin
     if (mem_data_idx < MEM_LENGTH && mem_data_idx >= MEM_ROM_LENGTH) begin
         if (mem_data_we) begin
diff --git a/test/test.S b/test/test.S
index 1e8cd9e..9f11e27 100644
--- a/test/test.S
+++ b/test/test.S
@@ -372,6 +372,12 @@ test_jalr:
 .data
 someint:
     .word 0xfedcba98
+someint16:
+    .byte 0x1122
+someint8:
+    .byte 0xaa
+anotherint8:
+    .byte 0xbb
 
 .bss
 anotherint: